Patents by Inventor Chao-Yang Lu

Chao-Yang Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9287209
    Abstract: Embodiments described herein provide a structure for finger capacitors, and more specifically metal-oxide-metal (“MOM”) finger capacitors and arrays of finger capacitors. A plurality of Shallow Trench Isolation (STI) formations is associated with every other column of capacitor fingers, with poly fill formations covering the STI formations to provide a more robust and efficient structure.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: March 15, 2016
    Assignee: Broadcom Corporation
    Inventors: Agnes Neves Woo, Pascal Tran, Akira Ito, Guang-Jye Shiau, Chao-Yang Lu, Jung Wang
  • Publication number: 20150194433
    Abstract: A field-effect transistor (FET) based one-time programmable (OTP) device is discussed. The OTP device includes a fin structure, a gate structure, a first contact region, and a second contact region. The first contact region includes an insulating region and a conductive region and is configured to be electrically isolated from the gate structure. While, the second contact region includes the conductive region and is configured to be electrically coupled to at least a portion of the gate structure. The OTP device is configured to be programmed by disintegration of the insulating region in response to a first voltage being applied to the first contact and a second voltage being applied to the second contact region simultaneously, where the second voltage is higher than the first voltage by a threshold value.
    Type: Application
    Filed: January 8, 2014
    Publication date: July 9, 2015
    Applicant: BROADCOM CORPORATION
    Inventors: Shom PONOTH, CHANGYOK PARK, JIAN-HUNG LEE, CHAO-YANG LU, GUANG-JYE SHIAU
  • Patent number: 8841674
    Abstract: According to embodiments of the invention, a field transistor structure is provided. The field transistor structure includes a semiconductor substrate, a metal gate, a polycrystalline silicon (polysilicon) layer, and first and second metal portions. The polysilicon layer has first, second, third, and fourth sides and is disposed between the semiconductor substrate on the first side and the metal gate on the second side. The polysilicon layer is also disposed between the first and second metal portions on the third and fourth sides. According to some embodiments of the present invention, the field transistor structure may also include a thin metal layer disposed between the polysilicon layer and the semiconductor substrate. The thin metal layer may be electronically coupled to each of the first and second metal portions.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: September 23, 2014
    Assignee: Broadcom Corporaton
    Inventors: Chao-Yang Lu, Guang-Jye Shiau, Akira Ito
  • Publication number: 20130113077
    Abstract: Embodiments described herein provide a structure for finger capacitors, and more specifically metal-oxide-metal (“MOM”) finger capacitors and arrays of finger capacitors. A plurality of Shallow Trench Isolation (STI) formations is associated with every other column of capacitor fingers, with poly fill formations covering the STI formations to provide a more robust and efficient structure.
    Type: Application
    Filed: December 28, 2011
    Publication date: May 9, 2013
    Applicant: Broadcom Corporation
    Inventors: Agnes Neves WOO, Pascal Tran, Akira Ito, Guang-Jye Shiau, Chao-Yang Lu, Jung Wang
  • Publication number: 20130001574
    Abstract: According to embodiments of the invention, a field transistor structure is provided. The field transistor structure includes a semiconductor substrate, a metal gate, a polycrystalline silicon (polysilicon) layer, and first and second metal portions. The polysilicon layer has first, second, third, and fourth sides and is disposed between the semiconductor substrate on the first side and the metal gate on the second side. The polysilicon layer is also disposed between the first and second metal portions on the third and fourth sides. According to some embodiments of the present invention, the field transistor structure may also include a thin metal layer disposed between the polysilicon layer and the semiconductor substrate. The thin metal layer may be electronically coupled to each of the first and second metal portions.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: Broadcom Corporation
    Inventors: Chao-Yang Lu, Guang-Jye Shiau, Akira Ito