Patents by Inventor Chao Yi

Chao Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240182141
    Abstract: A multihull module is provided. The multihull module includes multiple power floats, an actuation interface controller, and a vehicle controller. The power floats are disposed on a vehicle. The actuation interface controller is coupled to the power floats, and is configured to control the power floats. The vehicle controller is coupled to the actuation interface controller, and is configured to provide a control signal to the actuation interface controller. The actuation interface controller controls the power floats according to the control signal.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: Metal Industries Research & Development Centre
    Inventors: Kuang-Shine Yang, Chao Chieh Hsu, Ping-Hua Su, Tsung-Yi Lan, Chia-Yu Hung
  • Publication number: 20240184784
    Abstract: The present disclosure relates to the field of computers, and provides an apparatus, a method, and a storage medium for database query, which are applied to a vector database, by acquiring a query request from a user, determining query parameters corresponding to each of multiple shards based on the query request using a preset neural network model, wherein the query parameters control query complexity by affecting a query range of database data of the query request for the corresponding shard; querying database data in each shard based on the query request and the query parameters to obtain a target query result. Accordingly, corresponding query parameters are adjusted for each shard, so that redundant queries are effectively avoided, and database performance is effectively improved.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: ZILLIZ INC.
    Inventors: Chao XIE, Chao GAO, Qianya CHENG, Xiaomeng YI
  • Publication number: 20240175900
    Abstract: A probe head includes a probe seat, and vertical probes each having a head portion including a head portion installation section with a first width, and a probe tip section including a probe tip contact part with a second width smaller than the first width and a probe tip gradually narrowing part which is located between the head portion installation section and the probe tip contact part, gradually narrows from the first width to the second width, and has a first length smaller than a second length of the probe tip contact part. The head portion installation section protrudes out of a lower surface of the probe seat for a length smaller than the sum of the first and second lengths. The vertical probe is great in current withstanding capability, structural strength and life time, and meets the requirement of probing tiny electrically conductive contacts.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MPI CORPORATION
    Inventors: CHIN-YI LIN, TZU-YANG CHEN, TZU-HAO CHIEN, CHAO-SHUN WANG, LI-MING FAN
  • Publication number: 20240160820
    Abstract: Systems and methods are described herein for attribute-point-based timing formal verification of application specific integrated circuit (ASIC) and system on chip (SoC) designs. A target circuit design having a first set of netlists and timing constraints is received. A plurality of key clock-pin-net-load-setting attributes are extracted from the first ported netlists and timing constraints. The clock-pin-net-load-setting attribute mismatch in the result report is checked between the target circuit design and a golden circuit design by comparing the plurality of target attributes with a plurality of golden attributes of the golden circuit design after the target design database is loaded for static timing analysis (STA).
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240145898
    Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
  • Publication number: 20240139374
    Abstract: Disclosed herein is use of collagen particles for preparation of a medicament for inducing hair follicles neogenesis or angiogenesis in a subject. The collagen particles in the present application have a diameter of about 10-200 ?m. According to some embodiments of the present disclosure, the collagen particles are administered to the subject in an amount of about 0.1 mg/cm2 to about 1,000 mg/cm2.
    Type: Application
    Filed: September 17, 2021
    Publication date: May 2, 2024
    Inventors: Dar-Jen HSIEH, Yun-Ju CHEN, Chao-Yi WEI
  • Publication number: 20240141480
    Abstract: Provided is a dual deposition chamber apparatus for producing silicon material, the apparatus including a furnace, a cooling jacket, a deposition device, and a vacuum extraction device. The cooling jacket communicates with the furnace, defines a space above the furnace, and includes an opening communicating with the space. The deposition device includes at least one first deposition substrate and at least one second deposition substrate. The at least one first deposition substrate and the at least one second deposition substrate are arranged side by side in the space, and respectively include a first inner wall surface and a second inner wall surface inclined downwards relative to a vertical axis. An uneven area is formed on the first inner wall surface and the second inner wall surface. The vacuum extraction device communicates with the opening of the cooling jacket.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Inventors: Chung-Wen LAN, Wen-Yi CHIU, Chao-Kun HSIEH, Chao-Hsiang HSIEH
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240145919
    Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.
    Type: Application
    Filed: September 6, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Shih-Keng Huang, Chao-Hsu Wu, Chih-Wei Liao, Sheng-Chin Hsu, Hao-Hsiang Yang, Tse-Hsuan Wang
  • Patent number: 11973163
    Abstract: A light emitting device includes an epitaxial structure and first and second electrodes on a side of the epitaxial structure. The epitaxial structure includes a first-type semiconductor layer, an active layer, and a second-type semiconductor layer. The active layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The first electrode is disposed on the epitaxial structure to be electrically connected with the first-type semiconductor layer. The second electrode is disposed on the epitaxial structure to be electrically connected with the second-type semiconductor layer. The second electrode is in ohmic contact with a second-type window sublayer of the second-type semiconductor layer.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: April 30, 2024
    Assignee: Tianjin Sanan Optoelectronics Co., Ltd.
    Inventors: ChingYuan Tsai, Chun-Yi Wu, Fulong Li, Duxiang Wang, Chaoyu Wu, Wenhao Gao, Xiaofeng Liu, Weihuan Li, Liming Shu, Chao Liu
  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20240134112
    Abstract: A lighting keyboard includes a backlight module and at least one keyswitch. The backlight module includes a lighting unit, a light guide panel, and a lighting board for illuminating a keycap of the keyswitch. The light guide panel includes a panel hole to accommodate the lighting unit. The light guide panel further includes plural slots intervally surrounding the lighting unit. The lighting board includes a micro-structure region facing toward the light guide panel. Each of the slots of the light guide panel has a bulge portion protruding to the lighting unit. At two sides of the bulge portion, each of the slots forms two slots walls with an obtuse angle, thereby expanding the transmitting angle for the multi-color lights from the lighting unit and enhancing the light-mixing uniformity while illuminating the keycap.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 25, 2024
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Chao-Yu Chen, Heng-Yi Huang
  • Publication number: 20240136280
    Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Wen Shih, Chen-Hua Yu, Han-Ping Pu, Hsin-Yu Pan, Hao-Yi Tsai, Sen-Kuei Hsu
  • Patent number: 11966530
    Abstract: A touchpad module includes a base plate, a touch member and at least one pressure sensing module. The touch member is located over the base plate. The touch member includes a touch plate and a touch sensitive circuit board. The pressure sensing module is arranged between the base plate and the touch member. The pressure sensing module includes a pressure sensor and a miniature supporting plate. The pressure sensor is installed on the miniature supporting plate. The pressure sensor is electrically connected with the touch sensitive circuit board through the miniature supporting plate. While the touch member is pressed in response to an external pressing force, the pressing force exerted on the touch member is sensed by the at least one pressure sensing module, and the pressure sensing module generates a pressure sensing signal.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 23, 2024
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Wei-Chiang Huang, Chao-Wei Lee, Hsueh-Chao Chang, Sian-Yi Chiu
  • Publication number: 20240128381
    Abstract: A power diode device includes a substrate. The substrate includes a core layer of a first conductive type, a first diffusion layer of the first conductive type, a second diffusion layer of a second conductive type, and a heavily doped region of the second conductive type. The core layer is located between the first diffusion layer and the second diffusion layer. A thickness of the core layer is greater than that of the second diffusion layer. The heavily doped region is located in the second diffusion layer and extends toward the core layer to form a PN junction between the heavily doped region and the core layer. A method for manufacturing the power diode device is also provided.
    Type: Application
    Filed: June 2, 2023
    Publication date: April 18, 2024
    Inventors: Ching Chiu TSENG, Tzu Yuan LO, Chao Yi CHANG
  • Publication number: 20240120410
    Abstract: A semiconductor structure includes a semiconductor epitaxial layer, a first semiconductor well, a second semiconductor well, a source doped region, a gate structure and a drain structure. The semiconductor epitaxial layer includes a first side and a second side opposite to the first side. The first semiconductor well is located on the first side of the semiconductor epitaxial layer. The second semiconductor well is located on the second side of the semiconductor epitaxial layer. The source doped region is located in the first semiconductor well. The gate structure overlaps the first semiconductor well and the source doped region on the first side of the semiconductor epitaxial layer. The drain structure includes a semiconductor substrate. The second side of the semiconductor epitaxial layer outside the second semiconductor well includes a connecting surface. The connecting surface of the semiconductor epitaxial layer is connected to the semiconductor substrate.
    Type: Application
    Filed: February 16, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tsu LEE, Yan-Ru CHEN, Chao-Yi CHANG, Kuang-Hao CHIANG
  • Patent number: 11955595
    Abstract: A ceramic-polymer film includes a polymer matrix; a plasticizer; a lithium salt; and AlxLi7-xLa3Zr1.75Ta0.25O12 where x ranges from 0.01 to 1 (LLZO), wherein the LLZO are nanoparticles with diameters that range from 20 to 2000 nm and wherein the film has an ionic conductivity of greater than 1×10?3 S/cm at room temperature. The nanocomposite film can be formed on a substrate and the concentration of LLZO nanoparticles decreases in the direction of the substrate to form a concentration gradient over the thickness of the film. The film can be employed as a non-flammable, solid-state electrolyte for lithium electrochemical cells and batteries. The LLZO serves as a barrier to dendrite growth.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 9, 2024
    Assignee: Bioenno Tech LLC
    Inventors: Zhigang Lin, Chunhu Tan, Chao Yi
  • Patent number: 11951233
    Abstract: Provided are methods of producing an acellular organ. The method includes the steps of, subjecting an organ derived from an animal to a static supercritical fluid (SCF) treatment followed by a dynamic SCF treatment. Optionally, the method of the present disclosure further includes a hypertonic and a hypotonic treatments prior to the static SCF treatment, and/or a neutralizing treatment after the dynamic SCF treatment. Also disclosed herein are acellular organs produced by the present method.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: April 9, 2024
    Assignee: ACRO BIOMEDICAL COMPANY. LTD.
    Inventors: Dar-Jen Hsieh, Chao-Yi Wei, Chao-Chin Chao, Jer-Cheng Kuo, Yi-Ping Lai, Srinivasan Periasamy
  • Patent number: 11953521
    Abstract: Provided is a probe card, comprising a guide plate and a shielding structure of single-layer or multi-layer. The guide plate comprises an upper surface, a lower surface, and at least one guide hole passing through the upper surface and the lower surface, and the guide hole is provided with an inner wall surface. At least one layer of the shielding structure is made of an electromagnetic absorption material or an electromagnetic reflection material, and the shielding structure is not connected to a ground. Each layer of the shielding structure is formed on the inner wall surface of the guide hole by means of atomic layer deposition or atomic layer etching, and a thickness of each layer is less than 1000 nm.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: April 9, 2024
    Assignee: BAO HONG SEMI TECHNOLOGY CO., LTD.
    Inventors: Chao-Cheng Ting, Li-Hong Lu, Huai-Yi Wang, Lung-Chuan Tsai