Patents by Inventor Chao-Wen Liu

Chao-Wen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194588
    Abstract: A semiconductor structure includes a first semiconductor substrate, a first interconnect structure disposed below the first semiconductor substrate, a through substrate via (TSV) penetrating through the first semiconductor substrate and extending into the first interconnect structure, and a first bonding conductor disposed below the first interconnect structure and electrically coupled to the TSV through the first interconnect structure. The TSV includes a first surface in the first interconnect structure and a second surface opposite to the first surface, and the first bonding conductor includes a first bonding surface facing away the first interconnect structure. In a view, a boundary of the first bonding surface of the first bonding conductor overlaps a boundary of the first surface of the TSV.
    Type: Application
    Filed: January 9, 2024
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih
  • Patent number: 12009575
    Abstract: A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: June 11, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nan-Chin Chuang, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • Patent number: 12001109
    Abstract: The electronic device includes a substrate; an active layer disposed above the first substrate; a first signal line disposed above the substrate; and a conductive pattern. The conductive pattern is in electrical contact with the active layer, wherein the conductive pattern includes a first side extending in a first direction, a second side extending in the first direction, and a third side connected between the first side and the second side, and wherein the third side includes a part that the part is not parallel to the first direction and not perpendicular to the first direction, and the part is located out of the first signal line.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: June 4, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Yu-Tsung Liu, Chao-Hsiang Wang, Te-Yu Lee
  • Publication number: 20240178303
    Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first semiconductor mesa formed on the semiconductor substrate within the first region; a second semiconductor mesa formed on the semiconductor substrate within the second region; and a field effect transistor (FET) formed on the semiconductor substrate. The FET includes a first doped feature of a first conductivity type formed in a top portion of the first semiconductor mesa; a second doped feature of a second conductivity type formed in a bottom portion of the first semiconductor mesa, the second semiconductor mesa, and a portion of the semiconductor substrate between the first and second semiconductor mesas; a channel in a middle portion of the first semiconductor mesa and interposed between the source and drain; and a gate formed on sidewall of the first semiconductor mesa.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Harry-Hak-Lay Chuang, Yi-Ren Chen, Chi-Wen Liu, Chao-Hsiung Wang, Ming Zhu
  • Publication number: 20240153881
    Abstract: A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 9, 2024
    Inventors: Chen-Hua Yu, Tzuan-Horng Liu, Ming-Fa Chen, Chao-Wen Shih, Sung-Feng Yeh
  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Patent number: 11916012
    Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih
  • Patent number: 8704848
    Abstract: A transform model is established by the calibration system for color transformation between a first color space and a second color space. Three first target curves are defined and transformed by the transform model so as to establish three look-up tables. The display is calibrated according to the three look-up tables such that the color temperature of the display may be substantially constant for every gray-level.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: April 22, 2014
    Assignee: Young Lighting Technology Inc.
    Inventors: Chao-Wen Liu, Hung-Wei Chih
  • Patent number: 7894197
    Abstract: An optical sensing module is adapted to be assembled to a frame of a display device. The display device comprises a display module and the frame, and the display module has a display area and the frame surrounds the display area. The optical sensing module comprises a casing and an optical sensor. The casing is pivoted to the frame and the optical sensor is configured in the casing for sensing external light projecting on a side of the casing. The optical sensor is capable of sensing a brightness of the display area when the side of the casing faces the display area and sensing a brightness of an ambient light when the side of the casing doesn't face the display area.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: February 22, 2011
    Assignee: Coretronic Corporation
    Inventors: Wei-Cheng Hwang, Chao-Wen Liu, Yung-Lung Liu, Chwen-Tay Hwang
  • Publication number: 20100265266
    Abstract: A calibration system and a method thereof for color calibration of a display are provided. A transform model is established by the calibration system for color transformation between a first color space and a second color space. Three first target curves are defined and transformed by the transform model so as to establish three look-up tables. The display is calibrated according to the three look-up tables such that the color temperature of the display may be substantially constant for every gray-level.
    Type: Application
    Filed: June 10, 2009
    Publication date: October 21, 2010
    Applicant: Coretronic Display Solution Corporation
    Inventors: Chao-Wen Liu, Hung-Wei Chih
  • Publication number: 20090057534
    Abstract: The invention discloses light source devices applied in backlight modules of image display panels. The light source device includes a current source unit generating a driving current, a plurality of light emitting units coupled in series to the current source unit, a plurality of current shunts corresponding to the light emitting units respectively and providing current bypasses for the driving current to bypass the corresponding light emitting units, a plurality of light sensing units sensing the brightness of the light emitting units, and a control unit generating a plurality of current shunt control signals for separately controlling the current shunts. Each of the current shunt control signals is generated according to the sensed brightness of the corresponding light emitting unit and is used in controlling the conduction statement of the current bypass provided by the corresponding current shunt.
    Type: Application
    Filed: March 3, 2008
    Publication date: March 5, 2009
    Applicant: CORETRONIC CORPORATION
    Inventors: Chao-Wen Liu, Yung-Lung Liu
  • Publication number: 20090033646
    Abstract: A display includes a display module, a light source, a light source driving circuit, a display driving circuit, and an optical sensor. The optical sensor is installed next to the light source for detecting the luminance and color temperature of the light source. The optical sensor is coupled to the display driving circuit for generating a feedback signal to the display driving circuit according to the luminance and the color temperature of the light source. The display driving circuit drives the display module to display an image according to a received image signal and updates the data of the image signal according to the feedback signal so as to adjust the luminance and the color temperature of the image.
    Type: Application
    Filed: April 21, 2008
    Publication date: February 5, 2009
    Inventors: Chao-Wen Liu, Chih-Kuo Lee
  • Publication number: 20080316472
    Abstract: An optical sensing module is adapted to be assembled to a frame of a display device. The display device comprises a display module and the frame, and the display module has a display area and the frame surrounds the display area. The optical sensing module comprises a casing and an optical sensor. The casing is pivoted to the frame and the optical sensor is configured in the casing for sensing external light projecting on a side of the casing. The optical sensor is capable of sensing a brightness of the display area when the side of the casing faces the display area and sensing a brightness of an ambient light when the side of the casing doesn't face the display area.
    Type: Application
    Filed: December 4, 2007
    Publication date: December 25, 2008
    Applicant: CORETRONIC CORPORATION
    Inventors: Wei-Cheng Hwang, Chao-Wen Liu, Yung-Lung Liu, Chwen-Tay Hwang
  • Patent number: 5922059
    Abstract: A connector for a circuit board has a pins that are compatible with a standard ISA connector. The connector includes at least 38 pins connected to a ground potential, at least 23 pins connected to a VCC potential, and a plurality of bus select pins, through which the circuit board can select a particular bus. Over the selected bus, communications are transmitted to and from the circuit board.
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: July 13, 1999
    Assignee: CSS Labs, Inc.
    Inventors: Yu-Zong Lin, Chao-Wen Liu