Abstract: A monolithic integrated circuit for use in a system having a host processor, the integrated circuit including at least one input pin for receiving command data from the host processor; at least one output pin for transmitting processed image data to the host processor in response to the command data; and an image processor configured to generate the processed image data by performing an image-processing function on image data captured by an image sensor.

Abstract: A monolithic integrated circuit comprising an image sensor for sensing image information; at least one analog to digital converter for converting analog signals corresponding to the image information into digital image data; and an image processor, the image processor including a range expansion circuit for range expanding the digital image data.

Abstract: A three-dimensional API for communicating with hardware implementations of vertex shaders and pixel shaders having local registers. With respect to vertex shaders, API communications are provided that may make use of an on-chip register index and API communications are also provided for a specialized function, implemented on-chip at a register level, that outputs the fractional portion(s) of input(s). With respect to pixel shaders, API communications are provided for a specialized function, implemented on-chip at a register level, that performs a linear interpolation function and API communications are provided for specialized modifiers, also implemented on-chip at a register level, that perform modification functions including negating, complementing, remapping, stick biasing, scaling and saturating.

Abstract: A photodetecting circuit comprising a photodetector for generating a signal in response to incident light; a storage node having first and second node terminals, the first node terminal being connected to the photodetector to receive the signal such that charge stored in the node changes during an integration period of the photodetecting circuit; and an output circuit for generating an output signal during a read period of the photodetecting circuit, the output signal being at least partially based on a voltage at the first terminal; the photodetecting circuit being configured to receive a reset signal; integrate charge in the storage node during an integration period following receipt of the reset signal; and receive a compensation signal at the second terminal of the storage node at least during the read period, the compensation signal increasing the voltage at the first terminal whilst the output circuit generates the output signal.

Abstract: An API is provided that enables programmability of a 3D chip, wherein programming or algorithmic elements written by the developer can be downloaded to the chip, thereby programming the chip to perform those algorithms. A developer writes a routine that is downloadable to a 3D graphics chip. There are also a set of algorithmic elements that are provided in connection with the API that have already been programmed for the developer, that are downloadable to the programmable chip for improved performance. Thus, a developer may download preexisting API objects to a 3D graphics chip. A developer adheres to a specific format for packing up an algorithmic element, or set of instructions, for implementation by a 3D graphics chip. The developer packs the instruction set into an array of numbers, by referring to a list of ‘tokens’ understood by the 3D graphics chip. This array of numbers in turn is mapped correctly to the 3D graphics chip for implementation of the algorithmic element by the 3D graphics chip.

Abstract: A monolithic integrated circuit including an image sensor for capturing image information; at least one analog to digital converter for converting analog signals corresponding to the image information into digital image data; and a first framestore for storing frames of the digital image data.

Abstract: A monolithic integrated circuit comprising an image processor configured to make each of a series of frames of image data available to a host processor, the image processor being configured to receive a first message from the host processor indicative of the host processor not requiring further access to the image data prior to a subsequent frame synchronisation signal; in response to the first message, causing at least part of the integrated circuit to enter a low power mode; and in response to a frame synchronisation signal, cause the part of the integrated circuit in the low power mode to exit the low power mode.

Abstract: A monolithic integrated circuit including an image sensor for capturing image information; at least one analog to digital convertor for converting analog signals corresponding to the image information into digital image data; and an image processor, the image processor including a low-pass filter for filtering the image data, thereby to generate filtered image data.

Abstract: A sensing device for: sensing coded data disposed on a surface; and generating interaction data based on the sensed coded data, the interaction data being indicative of interaction of the sensing device with the surface; the sensing device comprising:

Abstract: A scanning device for: scanning coded data disposed on a surface; and generating interaction data based on the sensed coded data, the interaction data being indicative of interaction of the scanning device with the surface; the coded data including, at a plurality of locations on the interface surface, a corresponding plurality of coded data portions, the scanning device comprising:

Abstract: A method and apparatus for collecting and distributing information to and from a computing element that is quickly scalable at the installation to varying types and numbers of signals. Standard sized modules containing a generalized set of; computation, discrete I/O, analog I/O, serial I/O, adaptable I/O, etc. or any combination thereof, provide the building blocks that can be attached to each other to provide the desired combination of functions. These modular components are mated to each other through a simple serial interface providing the inter-module communication interface and local power requirements. The modules are quickly stacked together and snapped in place in a manner supporting severe environmental conditions.

Abstract: The present invention relates to polynucleotide sequences in gene arrays that function as markers of photodamage and a personal care method of detecting photodamage using the markers.

Abstract: The present invention relates to polynucleotide sequences in gene arrays that function as markers of photodamage and a personal care method of detecting photodamage using the markers.

Abstract: A method and apparatus for collecting and distributing information to and from a computing element that is quickly scalable at the installation to varying types and numbers of signals. Standard sized modules containing a generalized set of; computation, discrete I/O, analog I/O, serial I/O, adaptable I/O, etc. or any combination thereof, provide the building blocks that can be attached to each other to provide the desired combination of functions. These modular components are mated to each other through a simple serial interface providing the inter-module communication interface and local power requirements. The modules are quickly stacked together and snapped in place in a manner supporting severe environmental conditions.

Abstract: The invention relates to an assay system for screening nutraceuticals, i.e., foods or food substances that occur naturally, or that are produced during processing which are capable of modulating in a subject the expression of one or more genes associated with a disease or undesirable physical condition. The nutraceuticals identified by the screening assays can be incorporated into compositions which may be administered to a subject to treat or prevent a disease or undesirable condition, or otherwise to improve the health of the subject. The invention further provides methods for modifying the amount of nutraceuticals in raw and processed foods or food substances.