Abstract: Inverters are efficient array-internal threshold detectors or comparators in digital imaging systems which use time-to-threshold A/D conversion, particularly CMOS image sensor arrays. The inverters compare sensor outputs to implicit inverter thresholds, with inverter outputs switching on threshold crossings. The inverters can have constituent transistors of with minimum size. Alternatively, non-minimum transistor dimensions can be selected to obtain desired threshold levels. Other logic circuits can also act as threshold detectors.

Abstract: Inverters are efficient array-internal threshold detectors or comparators in digital imaging systems which use time-to-threshold A/D conversion, particularly CMOS image sensor arrays. The inverters compare sensor outputs to implicit inverter thresholds, with inverter outputs switching on threshold crossings. The inverters can have constituent transistors of with minimum size. Alternatively, non-minimum transistor dimensions can be selected to obtain desired threshold levels. Other logic circuits can also act as threshold detectors.

Abstract: A digital-to-analog converter in which a counter tracks the elapsed time since the beginning of a conversion cycle. Simultaneously, a reference analog signal such as a voltage ramp is generated. When the count reaches a stored digital number value, a sample-and-hold circuit is triggered and acquires the value of the reference analog signal. Multiple stored digital number values can be converted using multiple sample-and-hold and trigger circuits which share the counter and the reference analog signal. Such parallel digital-to-analog conversion is useful in many applications such as digital communications, image display, and shared parallel analog-to-digital conversion.

Abstract: Differential measurements allow correction of fixed-pattern noise errors in digital imaging arrays which use time-to-threshold A/D conversion techniques. Two time-to-threshold measurements are made with the same sensor and threshold-detecting circuitry. The measurements are made in quick succession so that the amount of incident energy is substantially unchanged. However, the two measurements use differing initial sensor output levels or threshold levels. The difference between the two measurements then reflects the time required for each sensor output signal to change by an amount equal to the difference between the initial sensor output values or the threshold values. Repeatable noise terms are cancelled in the computed difference measurement.

Abstract: A machine used for digital counting which can provide multiple output counts. The machine is particularly useful in analog-to-digital (A/D) converters and in digital-to-analog (D/A) converters. The multiple output counts can change in different directions or in the same direction, and are generated using shared circuitry. The invention exploits properties of counting systems to allow A/D and D/A conversions in convenient digital number formats or in multiple different formats. The invention can be used in integrating converters to help eliminate errors such as comparator offset and dielectric absorption while converting and to increase the conversion rate.

Abstract: A machine for generating piece-wise non-linear reference waveforms at low cost, particularly in integrated circuit technologies. The reference waveform can be a distorted sinusoidal waveform such as a truncated sinusoid. Provided that local distortion is low enough in some waveform segments, for instance, in the transitions between saturation levels, parts of the waveform can be used as non-linear reference segments in data converters based on comparison of inputs. The distorted sinusoidal waveform can also be filtered to reduce distortion. In the preferred embodiment of the invention, suitable sinusoids with high or low distortion can be generated using an op-amp configured with a Wien Bridge providing positive feedback and a resistor bridge providing negative feedback. The invention differs from prior art Wien Bridge oscillators in having negative feedback gain that forces the op-amp output into saturation. One filter stage is provided by the positive feedback network itself.

Abstract: A machine or method used for reducing the implementation cost of digital filters that use multiplication operations. For each new input, a small look-up table of products is computed and stored. Weighting of the inputs when computing digital filter outputs can be accomplished using look-up table access, shifting, and addition. The invention can be used for constant filters or for adaptive filters. With constant filter coefficients, a small look-up table which exploits the properties of the various coefficient representations as a group is possible. With adaptive filters, a larger table may be needed, but can be used to reduce the multiplication cost of both filter output computation and filter adaptation. The invention is particularly useful in technologies where general multiplication is costly, such as field programmable gate arrays, application specific integrated circuits, and software running on general-purpose microprocessors.

Abstract: A machine used for digital counting which can provide multiple output counts. The machine is particularly useful in analog-to-digital (A/D) converters and in digital-to-analog (D/A) converters. The multiple output counts can change in different directions or in the same direction, and are generated using shared circuitry. The invention exploits properties of counting systems to allow A/D and D/A conversions in convenient digital number formats or in multiple different formats. The invention can be used in integrating converters to help eliminate errors such as comparator offset and dielectric absorption while converting and to increase the conversion rate.

Abstract: A machine used for multiplication which exploits the facts that cos(2&pgr;/3) is equal to minus one half and that the sum of cos(−2&pgr;/5) and cos(−4&pgr;/5) is also equal to minus one half. Low-cost multiplication by cos(2&pgr;/3) can be implemented with simple negation and shifting operations in three-point discrete Fourier transforms (DFTs) and in related three-point transforms. Low-cost multiplication of a multiplier input by both cos(−2&pgr;/5) and cos(−4&pgr;/5) can be implemented with a first multiplication of the multiplier input by one of the numbers to produce a first product, simple negation and shifting operations to obtain an intermediate result which is minus one half times the multiplier input, and subtraction of the first product from the intermediate result to obtain the second product.

Abstract: A machine used for analog-to-digital (A/D) conversion in which an analog input is compared to a piece-wise non-linear analog reference waveform. A digital count is recorded indicative of when the difference between the two becomes zero. Alternative mappings such a linear correspondence between analog input values and digital output values can be implemented via digital processing of each recorded count. The invention is particularly intended for use with sinusoidal reference waveforms to enable low-cost, high-precision A/D conversion at speeds much higher than are possible with piece-wise linear analog reference waveforms such as saw-tooth or triangle waveforms. The invention can be implemented with multiple A/D converters sharing a piece-wise non-linear analog reference waveform, with conversion cycles using increasing or decreasing waveform segments, and with compensation of comparator-induced errors.

Abstract: A machine used for conversion of digital number values to analog signal values. In one embodiment, a counter tracks the elapsed time since the beginning of a conversion cycle. Simultaneously, a reference analog signal such as a voltage ramp is generated. When the count provided by the counter reaches a stored digital number value, a sample-and-hold circuit is triggered and acquires the value of the reference analog signal. A multiplicity of stored digital number values can be converted by using a multiplicity of sample-and-hold and trigger circuits. The conversion operations can share the counter and the reference analog signal. The invention can be used to implement massively parallel digital-to-analog conversion. Parallel digital-to-analog conversion is useful in many applications such as digital communications, image display, and shared parallel analog-to-digital conversion where it is desired to convert multiple digital numbers to analog signals.

Abstract: A machine used for multi-stage analog-to-digital (A/D) conversion accepts as a stage input an unknown analog input signal and produces as a stage output a residue signal which is negatively scaled with respect to the unknown analog input signal. Combination of the unknown analog input signal and adjustment signals and scaling are accomplished using a circuit requiring only a single op-amp and corresponding output settling delay. The negatively scaled residue signal is passed as input to the following stage. The effects of negative scaling are compensated for in the following stage with proper connection of desired pre-generated reference signals to the second stage's comparators. The invention has a much lower implementation cost than full flash A/D conversion, particularly for high-precision conversions. The invention is also faster than successive approximation (SA) A/D conversion. With proper design, the implementation cost of the present invention can be less than that of prior art SA A/D converters.

Abstract: A machine or method used for exposure adjustment in digital imaging. Two or more digital images form a set of digital images of a field of view. At least one pixel in one of the images comprises a digital number representative of a signal level of a sensor response to visible light. Digital images from the set are arithmetically combined to form a composite digital image of the field of view. The composite digital image can have different exposure properties than the component digital images, for instance differing exposure times and differing ranges of variation in the digital numbers representative of features in the field of view. The invention enables adjustment of exposure during arithmetic combination, so that the various features of the field of view in the composite image are neither overexposed nor underexposed unless such characteristics are desired. The invention enables enhancement of streaks or motion blur during combination, and also allows removal of streaks or motion blur.

Abstract: A machine or method used in signal processing transforms that involve computing one or more sums each of one or more products. Multiplication for one product is implemented using one machine or method, and multiplication for a second product is implemented using a machine or method that is not capable of computing the first product. Alternatively, the numbers used in computing one product have a pair of finite-precision numeric formats that is not the same as the pair of finite-precision numeric formats of numbers used in computing a second product. Which machine or method is used depends on the particular representation of one or both numbers being multiplied, and on common properties of groups of allowed input number values and representations.

Abstract: A machine used for acquisition of digital images. A counter tracks the elapsed time since the beginning of image acquisition. When an analog sensor output changes by a pre-set amount, the count is stored as the digital number value representing the sensor output. This eliminates the need for a traditional analog-to-digital (A/D) conversion of the sensor output. In an array of sensors, the circuitry of the invention is simple enough to enable massively parallel A/D conversion. The invention can be implemented in an array using a separate counter for each sensor, but it is also possible to reduce costs by sharing counters among the sensors.

Abstract: A machine or method used in signal processing transforms involving computation of one or more sums each of one or more products. A first multiplier computes a first product and a first set of intermediate terms. A second multiplier computes a second product using one or more of the terms computed by the first multiplier. Because they share computations, the two multipliers can have lower implementation cost than if they function separately. The invention is particularly useful in signal processing transforms that have fixed weights, such as discrete Fourier transforms, discrete cosine transforms, and pulse-shaping filters. These transforms are multiply-intensive and are used repeatedly in many applications. Implementations of shared multiplication techniques can have reduced chip space, computation time, and power consumption relative to implementations that do not share computation.

Abstract: The present invention is a machine or method used in digital communications. Symbols are selected in periodic fashion from at least two different symbol constellations. At least one of the symbol constellations has a non-conjugated second moment not equal to zero. The non-conjugated second moment is a second-order statistic. Symbol selection leads to second-order input statistics having cyclostationary phase, and thus to second-order output statistics having cyclostationary phase. These statistics can be used for low-complexity identification and equalization of both linear and nonlinear channels. The invention allows for low-complexity identification and equalization of linear channels and of nonlinear channels without requiring constant-modulus constellations.