Patents by Inventor Charles F. Carey
Charles F. Carey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7851911Abstract: A semiconductor chip for forming the same. The semiconductor chip includes M regular solder bump structures and N monitor solder bump structures, M and N being positive integers. If a flip chip process is performed for the semiconductor chip, then the N monitor solder bump structures are more sensitive to a cool-down stress than the M regular solder bump structures. The cool-down stress results from a cool-down step of the flip chip process. Each of the M regular solder bump structures is electrically connected to either a power supply or a device of the semiconductor chip. Each of the N monitor solder bump structures is not electrically connected to a power supply or a device of the semiconductor chip.Type: GrantFiled: March 2, 2010Date of Patent: December 14, 2010Assignee: International Business Machines CorporationInventors: Charles F. Carey, Bernt Julius Hansen, Ashwani K. Malhotra, David L. Questad, Wolfgang Sauter
-
Publication number: 20100155943Abstract: A semiconductor chip for forming the same. The semiconductor chip includes M regular solder bump structures and N monitor solder bump structures, M and N being positive integers. If a flip chip process is performed for the semiconductor chip, then the N monitor solder bump structures are more sensitive to a cool-down stress than the M regular solder bump structures. The cool-down stress results from a cool-down step of the flip chip process. Each of the M regular solder bump structures is electrically connected to either a power supply or a device of the semiconductor chip. Each of the N monitor solder bump structures is not electrically connected to a power supply or a device of the semiconductor chip.Type: ApplicationFiled: March 2, 2010Publication date: June 24, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles F. Carey, Bernt Julius Hansen, Ashwani K. Malhotra, David L. Questad, Wolfgang Sauter
-
Patent number: 7674637Abstract: A semiconductor chip and methods for forming the same. The semiconductor chip includes M regular solder bump structures and N monitor solder bump structures, M and N being positive integers. If a flip chip process is performed for the semiconductor chip, then the N monitor solder bump structures are more sensitive to a cool-down stress than the M regular solder bump structures. The cool-down stress results from a cool-down step of the flip chip process. Each of the M regular solder bump structures is electrically connected to either a power supply or a device of the semiconductor chip. Each of the N monitor solder bump structures is not electrically connected to a power supply or a device of the semiconductor chip.Type: GrantFiled: May 17, 2007Date of Patent: March 9, 2010Assignee: International Business Machines CorporationInventors: Charles F. Carey, Bernt Julius Hansen, Ashwani K. Malhotra, David L. Questad, Wolfgang Sauter
-
Publication number: 20080286886Abstract: A semiconductor chip and methods for forming the same. The semiconductor chip includes M regular solder bump structures and N monitor solder bump structures, M and N being positive integers. If a flip chip process is performed for the semiconductor chip, then the N monitor solder bump structures are more sensitive to a cool-down stress than the M regular solder bump structures. The cool-down stress results from a cool-down step of the flip chip process. Each of the M regular solder bump structures is electrically connected to either a power supply or a device of the semiconductor chip. Each of the N monitor solder bump structures is not electrically connected to a power supply or a device of the semiconductor chip.Type: ApplicationFiled: May 17, 2007Publication date: November 20, 2008Inventors: Charles F. Carey, Bernt Julius Hansen, Ashwani K. Malhotra, David L. Questad, Wolfgang Sauter
-
Patent number: 7119003Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.Type: GrantFiled: June 8, 2005Date of Patent: October 10, 2006Assignee: International Business Machines CorporationInventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White
-
Patent number: 7067916Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.Type: GrantFiled: June 20, 2001Date of Patent: June 27, 2006Assignee: International Business Machines CorporationInventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White
-
Patent number: 6677522Abstract: An electronic component such as a ceramic capacitor is coupled to a dielectric substrate package. Encapsulant material substantially surrounding the sides of the component, develops cracks therein, particularly near the corners of the component where CTE stresses are greatest. The cracks propagate downward into the dielectric substrate material and sever circuit lines in the substrate causing failure. A mounting pad for the component is extended from beneath the component to substantially beyond the outer periphery of the encapsulant material to prevent cracks from propagating into the dielectric material.Type: GrantFiled: September 26, 2002Date of Patent: January 13, 2004Assignee: International Business Machines CorporationInventors: Charles F. Carey, Eric A. Johnson, Alfredo Migliore
-
Publication number: 20020195707Abstract: A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.Type: ApplicationFiled: June 20, 2001Publication date: December 26, 2002Applicant: International Business machines CorporationInventors: William E. Bernier, Charles F. Carey, Eberhard B. Gramatzki, Thomas R. Homa, Eric A. Johnson, Pierre Langevin, Irving Memis, Son K. Tran, Robert F. White
-
Patent number: 5597469Abstract: Small, closely spaced deposits of solder materials may be formed with high volumetric accuracy and uniformity of shape by depositing a layer of conductive material over surfaces of a dielectric layer having apertures or recesses (e.g. blind apertures) and conductors and/or pads exposed by those apertures or recesses, masking regions of the conductive material with a further patterned dielectric layer, electroplating solder materials onto regions of the conductive material exposed by the mask, removing the mask and portions of the conductive material by selective etching and reflowing solder away from at least a portion of the surfaces of the apertured dielectric layer. Uniformity of electroplating within blind apertures is enhanced by a combination of fluid jet sparging and cathode agitation. Excess conductor material in the resulting solder deposit can be avoided by replacing conductor material with a constituent component of a solder material in an immersion bath prior to electroplating.Type: GrantFiled: February 13, 1995Date of Patent: January 28, 1997Assignee: International Business Machines CorporationInventors: Charles F. Carey, Kenneth M. Fallon, Voya R. Markovich, Douglas O. Powell, Gary P. Vlasak, Richard S. Zarr
-
Patent number: 5075965Abstract: A controlled collapse chip connect method of joining an IC chip to a microelectronic circuit card. According to the method an inhomogeneous, anisotropic column of solder is deposited from a Pb/Sn alloy onto solder wettable I/O terminals of the I/C chip, without subsequent homogenizing reflow. The solder core has a Pb rich core and an Sn rich cap. The matching footprint of the solder wettable I/O terminals on the microelectronic circuit card is substantially free of deposited solder and presents a protected Cu surface to the solder columns, or, at most a surface of Cu and anti-oxidant. The chip is aligned with the corresponding footprints on the microelectronic circuit card, and the solder is reflowed to bond the chip to the microelectronic circuit card.Type: GrantFiled: November 5, 1990Date of Patent: December 31, 1991Assignee: International Business MachinesInventors: Charles F. Carey, Kenneth M. Fallon, Rochelle Ginsburg, Charles G. Woychik