Abstract: A tightly coupled data processing system having high performance characteristics, including at least one general purpose host processor coupled to host processor ports of a High Performance Storage Unit, and a Scientific Processor directly coupled to scientific processor ports of the High Performance Storage Unit is described. The Scientific Processor is under task assignment control of the host processor and shares the same memory space as the host processor, and thereby provides the tight coupling without need of dedicated memory or caching. Provision is also made for the Scientific Processor to share the virtual address space of the host processor. A tightly coupled system is also disclosed wherein a plurality of general purpose host processors are each coupled to one or more High Performance Storage Units, and a Multiple Unit Adapter is utilized to couple an associated Scientific Processor to all of the High Performance Storage Units.

Abstract: An improved Scientific Processor for use in a data processing system having a general purpose host processor and a High Performance Storage Unit, and under operational control of the host processor is described. The Scientific Processor includes a Vector Processor Module and a Scalar Processor Module, each operable at comparable rates, wherein scalar operands and vector operands can be manipulated in various combinations under program control of an associated host processor, all without requirement of dedicated storage or caching. The Scalar Processor Module includes instruction flow control circuitry, loop control circuitry for controlling nested loops, and addressing circuitry for generating addresses to be referenced in the High Performance Storage Unit. A scalar processor arithmetic logic unit is described for performing scalar manipulations. The Vector Processor Module includes vector control circuitry and vector file storage circuitry together with vector file loading and vector storage circuitry.