Abstract: A balanced power amplifier circuit arrangement comprises a driver amplifier stage (22) adapted to receive and amplify a signal. The amplified signal is input to a first coupler (26). The first coupler (26) produces an in-phase signal and an out-of-phase quadrature signal. A first power amplifier (38) receives and amplifies the in-phase signal. A second power amplifier (40) receives and amplifies the out-of-phase signal. A first switch (28) alternately connects an isolated port of the first coupler to ground (32) or a bypass path (36). A second coupler (42) receives and combines the amplified in-phase signal and the amplified out-of-phase signal to produce a combined signal. A second switch (30) alternately connects an isolated port of the second coupler (42) to either ground (34) or the bypass path (36). When the power amplifiers (38, 40) are powered down, the first coupler (26) splits the RF-signal into an in-phase signal and an out-of-phase signal.

Abstract: A battery (102) powers a wireless telephone's power amplifier (106) through a Switch Mode Power Supply (SMPS) (104). The SMPS has a capacity lower than the maximum power requirements of the amplifier. When a controller (116) senses that an amplifier power-requirement threshold has been exceeded, it closes a switch (114) parallel to the SMPS, allowing power to flow from the battery to the amplifier without passing through the SMPS. This architecture allows the use of a smaller SMPS, and eliminates SMPS-generated noise to the amplifier when the amplifier is least able to tolerate such noise, namely, under high power conditions.

Abstract: A balanced power amplifier circuit arrangement comprises a driver amplifier stage (22) adapted to receive and amplify a signal. The amplified signal is input to a first coupler (26). The first coupler (26) produces an in-phase signal and an out-of-phase quadrature signal. A first power amplifier (38) receives and amplifies the in-phase signal. A second power amplifier (40) receives and amplifies the out-of-phase signal. A first switch (28) alternately connects an isolated port of the first coupler to ground (32) or a bypass path (36). A second coupler (42) receives and combines the amplified in-phase signal and the amplified out-of-phase signal to produce a combined signal. A second switch (30) alternately connects an isolated port of the second coupler (42) to either ground (34) or the bypass path (36). When the power amplifiers (38, 40) are powered down, the first coupler (26) splits the RF-signal into an in-phase signal and an out-of-phase signal.

Abstract: Techniques for “strapping” a primary conductor with a secondary conductor in an integrated circuit (IC). The IC includes a number of circuit elements interconnected by a secondary conductor through a number of vias disposed at a number of locations for coupling the circuit elements as an alternative to a primary conductor. The primary conductor is typically formed with a low loss metal (e.g., copper or copper alloy), and the secondary conductor is typically formed with a lossy metal (e.g., aluminum or aluminum alloy) relative to the low loss metal. The secondary conductor is strapped to the primary conductor by the vias, which may be disposed only at both ends or along the entire length of the secondary conductor. The secondary conductor is formed using design guidelines such that it provides the required electrical connectivity when the primary conductor is not present but minimally interferes with the RF performance of the primary conductor.

Abstract: A local oscillator signal for direct downconversion is generated using an upper frequency oscillator signal and a lower frequency oscillator signal, both of which have frequencies different from a frequency of an RF input signal. The local oscillator signal thus generated has a frequency that is either the sum or the difference of the frequencies of the upper and lower frequency oscillator signals. As a result, the risk of local oscillator signals re-radiating and coupling the RF signal input is significantly reduced. In addition, in QPSK systems, a quadrature local oscillator signal can be generated with accurate phasing relative to an in-phase local oscillator signal.

Abstract: Power detectors sense load mismatch conditions and cause the power output of a power amplifier to be reduced in response to a load mismatch. Transmitted and reflected power measurements are used to calculate a load mismatch criterion. A power amplifier is configured based on the calculated load mismatch criterion. A dual-directional coupler may be used to separate a power signal into transmitted and reflected components. With output power reduced under load mismatch conditions, signal distortion levels may be reduced to acceptable levels.

Abstract: A power detector (50) detects a power level of an amplified signal (S20) produced by a power amplifier (16) on the same integrated circuit (100). The power detector compensates for an effect of temperature variations on the magnitude of the detected power level.

Abstract: A power detector (50) detects a power level of an amplified signal (S20) produced by a power amplifier (16) on the same integrated circuit (100). The power detector compensates for an effect of temperature variations on the magnitude of the detected power level.

Abstract: A battery (102) powers a wireless telephone's power amplifier (106) through a Switch Mode Power Supply (SMPS) (104). The SMPS has a capacity lower than the maximum power requirements of the amplifier. When a controller (116) senses that an amplifier power-requirement threshold has been exceeded, it closes a switch (114) parallel to the SMPS, allowing power to flow from the battery to the amplifier without passing through the SMPS. This architecture allows the use of a smaller SMPS, and eliminates SMPS-generated noise to the amplifier when the amplifier is least able to tolerate such noise, namely, under high power conditions.

Abstract: In an exemplary application, an apparatus according to a disclosed embodiment receives a radio frequency signal and outputs an intermediate frequency signal. Rejection of image components in the intermediate frequency signal is obtained without the need to preprocess the radio frequency signal with an image reject filter. Such an apparatus may also exhibit an image rejection performance that is robust to frequency deviation of a local oscillator.

Abstract: Techniques to reduce intermodulation distortion at the output of an active circuit having even-order and odd-order nonlinearities. The IM3 products generated by the even-order nonlinearity of the active circuit are canceled against the IM3 products generated by the odd-order nonlinearity. The amplitude and phase of the IM3 products can be manipulated by adjusting either the source or load impedance, or both, of the active circuit. The amplitude and phase of the IM2 products generated by the even-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at sub-harmonic and second harmonic frequencies (i.e., the frequencies of the IM2 products). The amplitude and phase of the IM3 products generated by the odd-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at the fundamental frequency.

Abstract: An IF limiting amplifier uses localized positive feedback in each amplifier stage to provide additional small signal gain while maintaining the limiting gain. The extra small signal gain results in higher overall sensitivity for the receiver at less bias current. The reduction in the number of stages needed to perform the same signal response results in a significant decrease in power consumption by the circuit.

Abstract: An I/Q quadraphase modulator circuit for correcting phase errors of, typically, LO input quadrature signals. The circuit uses a pair of Gilbert cell multipliers, to the bottom ports of which are applied I and Q signals, and to the top ports of which are applied sum and difference, limited, quadrature, differential signals. The result is to make the circuit less sensitive to LO phase errors and thus to improve sideband (image) rejection over the conventional circuit typically using one Gilbert cell multiplier.