Patents by Inventor Charles Stager
Charles Stager has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9793172Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: October 20, 2016Date of Patent: October 17, 2017Assignee: Mie Fujitsu Semiconductor LimitedInventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Publication number: 20170040225Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: October 20, 2016Publication date: February 9, 2017Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 9514940Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: January 20, 2015Date of Patent: December 6, 2016Assignee: Mie Fujitsu Semiconductor LimitedInventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Publication number: 20160268133Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: January 20, 2015Publication date: September 15, 2016Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 8999861Abstract: A method for fabricating a semiconductor structure so as to have reduced junction leakage is disclosed. The method includes providing substitutional boron in a semiconductor substrate. The method includes preparing the substrate using a pre-amorphization implant and a carbon implant followed by a recrystallization step and a separate defect repair/activation step. Boron is introduced to the pre-amorphized region preferably by ion implantation.Type: GrantFiled: May 11, 2012Date of Patent: April 7, 2015Assignee: SuVolta, Inc.Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Lucian Shifren, Dalong Zhao, U.C. Sridharan, Michael Duane
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Patent number: 8937005Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: October 4, 2013Date of Patent: January 20, 2015Assignee: SuVolta, Inc.Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 8796048Abstract: The present disclosure provides methods and structures for measurement, control, and monitoring the thickness of thin film layers formed as part of a semiconductor manufacturing process. The methods and structures presented provide the capability to measure and monitor the thickness of the thin film using trench line structures. In certain embodiments, the thin film thickness measurement system can be integrated with thin film growth and control software, providing automated process control (APC) or statistical process control (SPC) capability by measuring and monitoring the thin film thickness during manufacturing. Methods for measuring the thickness of thin films can be important to the fabrication of integrated circuits because the thickness and uniformity of the thin film can determine electrical characteristics of the transistors being fabricated.Type: GrantFiled: May 11, 2012Date of Patent: August 5, 2014Assignee: Suvolta, Inc.Inventors: Scott E. Thompson, Pushkar Ranade, Lance Scudder, Charles Stager
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Publication number: 20140038386Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: October 4, 2013Publication date: February 6, 2014Applicant: SuVolta, Inc.Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 8569156Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: May 16, 2012Date of Patent: October 29, 2013Assignee: SuVolta, Inc.Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 7842616Abstract: Methods for fabricating semiconductor structures are provided. A first layer may be deposited onto a substrate followed by the deposition of a second layer onto the first layer. A plurality of line structures may be etched in the second layer. A third layer, deposited onto the plurality of line structures of the second layer, may subsequently be etched to expose the plurality of line structures in the second layer. The plurality of line structures in the second layer may be removed, leaving an etched third layer. The etched third layer may be used as a mask to etch the first layer to form a semiconductor structure in the first layer. In some respects, the methods may include steps for etching the substrate using the etched first layer. The methods may also provide annealing the etched substrate to form a corrugate substrate surface.Type: GrantFiled: January 22, 2007Date of Patent: November 30, 2010Assignee: Advanced Technology Development Facility, Inc.Inventors: Shuji Ikeda, Jeff Wetzel, James Beach, Charles Stager, Michael Gotskowski, Andrew Collin Campbell
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Publication number: 20080176406Abstract: Methods for fabricating semiconductor structures are provided. A first layer may be deposited onto a substrate followed by the deposition of a second layer onto the first layer. A plurality of line structures may be etched in the second layer. A third layer, deposited onto the plurality of line structures of the second layer, may subsequently be etched to expose the plurality of line structures in the second layer. The plurality of line structures in the second layer may be removed, leaving an etched third layer. The etched third layer may be used as a mask to etch the first layer to form a semiconductor structure in the first layer. In some respects, the methods may include steps for etching the substrate using the etched first layer. The methods may also provide annealing the etched substrate to form a corrugate substrate surface.Type: ApplicationFiled: January 22, 2007Publication date: July 24, 2008Inventors: Shuji Ikeda, Jeff Wetzel, James Beach, Charles Stager, Michael Gotskowski, Andrew Collin Campbell