Abstract: A heat sink buffer 10 is provided, including a backplate 20 defining a heat transfer passage 24. A thermally conductive buffer element 22 is positioned within and secured to the heat transfer passage 24 to provide a thermal conduit through the backplate 20.

Abstract: A joint structure and method for bonding together two components, such as when attaching an electrical circuit element to a conductor on a substrate. The joint structure comprises a mesh infiltrated by a solder material, in which the mesh is preferably formed of a material having a higher thermal conductivity than the solder material. The joint structure is able to offer improvements in thermal conductivity, electrical conductivity, reflow processing, and stress distribution between the structures it connects. Each of these attributes of the joint structure can be tailored to some degree by the choices of materials for the mesh and the solder material.

Abstract: A heat sink buffer 10 is provided, including a backplate 20 defining a heat transfer passage 24. A thermally conductive buffer element 22 is positioned within and secured to the heat transfer passage 24 to provide a thermal conduit through the backplate 20.

Abstract: A high power module containing high power, high frequency semiconductor switching devices and methods of operating the same that provide high power and low inductance. The module incorporates compositional, geometrical and electrical symmetry. The module also includes short internal leads, special IC chip substrates, trimmable gate lead resistances, a special composite metal/ceramic baseplate, and a special terminal conductor overlap.

Abstract: A substrate subassembly for a high power module, and methods involving the same. The substrate subassembly contains only one switching transistor and has at least one integral short terminal lead tab. The substrate subassemblies can be pretested at significant operating current, to obtain enhanced characterization and matching of mounted switching transistors. Trimmable gate lead resistances can be incorporated in the substrate subassemblies. Enhanced compositional, geometrical and electrical module symmetry is available. New module structures and method are afforded.

Abstract: A readily manufacturable low inductance linear semiconductor switching module having coplanar contacts. Also disclosed is a pretestable terminal subassembly for such a module, and a method of making such a terminal subassembly. The module can contain high power, high frequency semiconductor switching devices, operating at high power but low inductance. The module incorporates compositional, geometrical and electrical symmetry in a linear configuration. The terminal subassembly is readily fabricated and assembled into the module. In addition, it permits use of short internal leads that are readily connected to the terminal subassembly.

Abstract: A low inductance coaxial semiconductor switching module and methods of operating the same. The module can contain high power, high frequency semiconductor switching devices, operated to provide high power at low inductance. The module incorporates compositional, geometrical and electrical symmetry in a coaxial configuration. The module also includes short internal leads, a special circumferential array of substrates, a special circular gate circuit, a special circular kelvin circuit, and special terminal subassembly and special module mounting features.

Abstract: A method and apparatus for electron or laser beam welding of semiconductor subassemblies to larger terminal members, without exposing semiconductor chips in such subassemblies to detrimental welding "flash".

Abstract: A substrate subassembly for a high power module, and methods involving the same. The substrate subassembly contains only one switching transistor and has at least one integral short terminal lead tab. The substrate subassemblies can be pretested at significant operating current, to obtain enhanced characterization and matching of mounted switching transistors. Trimmable gate lead resistances can be incorporated in the substrate subassemblies. Enhanced compositional, geometrical and electrical module symmetry is available. New module structures and method are afforded.

Abstract: A low inductance linear semiconductor switching module and methods of operating the same. The module can contain high power, high frequency semiconductor switching devices, operated to provide high power at low inductance. The module incorporates compositional, geometrical and electrical symmetry in a linear configuration. The module also includes short internal leads, special linear arrays substrates, special linear gate circuit constructions, special kelvin circuit constructions, special terminal subassemblies and special module interconnection techniques.

Abstract: A method and apparatus are disclosed for enabling automated printing of through holes extending between top and bottom surfaces of a ceramic substrate or the like. The perimeter of the substrate is placed on a support that locates the bottom surface of the substrate spaced from a member that interacts with the interior portion of the substrate. The interacting member has holes that correspond to the through holes in the substrate, and it is moved generally perpendicular to the substrate to a position where it is in juxtaposition with the bottom surface of the substrate and its holes are in registration with the holes in the substrate. Conductive material is applied to the top surface of the substrate and a vacuum is applied to the holes in the interacting member to pull the conductive material through the through holes in the substrate. The vacuum is then discontinued and the interacting member is moved back to a position where it is spaced from the bottom surface of the substrate.

Abstract: A method and apparatus are disclosed for enabling automated printing of through holes extending between top and bottom surfaces of a ceramic substrate or the like. The perimeter of the substrate is placed on a support that locates the bottom surface of the substrate spaced from a member that interacts with the interior portion of the substrate. The interacting member has holes that correspond to the through holes in the substrate, and it is moved generally perpendicular to the substrate to a position where it is in juxtaposition with the bottom surface of the substrate and its holes are in registration with the holes in the substrate. Conductive material is applied to the top surface of the substrate and a vacuum is applied to the holes in the interacting member to pull the conductive material through the through holes in the substrate. The vacuum is then discontinued and the interacting member is moved back to a position where it is spaced from the bottom surface of the substrate.

Abstract: An interconnection lead is provided for electrically and physically connecting a plurality of bonding sites on an integrated circuit to a plurality of external electrical connections. The interconnection lead contains a plurality of individual electrical leads which have been formed so as to have an arcuate shape at the region where each individual lead is bonded to the integrated circuit. In addition, the arcuate shapes are all of similar length and all rotate in the same direction around the integrated circuit. This design provides enhanced strain relief during use, since the arcuate shapes permit rotation of the integrated circuit during mounting or excessive lead stress.

Abstract: A lead frame for a molded semiconductor device package. The lead frame has a pattern of finger leads with convergent free inner ends and dam bars between adjacent finger leads. The dam bars are partially severed from their contiguous finger leads due to cuts on their edges intended to face a body member molded over the finger lead inner ends. The partially severed dam bar edge is preferably positioned to be substantially at the periphery of the molded body member. The resultant molded body member can thus have a finished surface even between the finger leads as molded and dam bar cutting die wear reduced.

Abstract: A power semiconductor device package is made using a subassembly of a die mount substrate and a lead frame. The subassembly is interlocked in a manner that permits relative movement without losing alignment. A method is described in which the lead frame interlock has a first position to facilitate making electrical interconnections. In a second position, package encapsulation is facilitated. In a preferred embodiment the lead frame interlocks with an element lightly press fitted in package mount holes in the die mount substrate. After package encapsulation, the interlock element is pressed out of the substrate to separate unused parts of the lead frame from the package and to make the substrate holes available for package mount.