Abstract: A waveform synthesizer is controlled in response to a stored program control utilizing tabular data stored in memory as the basis for generating timing signals to drive the power switching devices of the synthesizer. A plurality of tables of differing modulation indices define rated current output and a below rated current output. The table defines rated level output timing signals as both pulse width and frequency modulated to reduce harmonics. Various overload conditions result in selection of different modulation indices or a total current shutdown. A high peak current overload results in a halt in a progressive upward selection of modulation indices during start-up. A high average current overload results in a reduction in modulation indices until the overload has cleared.

Abstract: A turn-off loss reduction network is applied to the power transistors of a double-ended inverter circuit to reduce power dissipation therein. A switched resonance discharge circuit is utilized to discharge the storage capacitor of the turn-off loss reduction network. Dissipation during discharge is eliminated by including an energy recovery circuit in the discharge network which is operative to return the energy to the input voltage source of the inverter. The gate discharge circuit includes a gated resonant discharge path with an inductive storage medium having a secondary winding or otherwise coupled to return the energy to the input voltage source.At the beginning of the conduction cycle of the power switching transistor, a gate is enabled which allows the capacitor to discharge into the inductive storage medium. When the discharge current reaches its peak value, the gate is disabled, and the energy stored in the inductive medium is discharged to the source by flyback action.

Abstract: A control arrangement for a three-phase, uninterruptible power supply generates timing signals to drive the static switches of inverters located in each phase. This control arrangement precisely controls the phase differences of the inverter signals with relation to each other so that while the overall three-phase power supplied by the inverters is nulled, power circulation through the inverters compensates for unbalanced output loads thereby maintaining balanced phase angles between the output voltage and a balanced input impedance at the input of the power supply.