Abstract: Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.

Abstract: Wiring structures with dummy metal features and methods of manufacture are disclosed. A structure includes a metal wiring structure, and dummy metal features in electrical and direct physical contact with the metal wiring structure in a same plane as the metal wiring structure. The dummy metal features do not change a resistance of the metal wiring structure and are remote from other structures.

Abstract: Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.

Abstract: Wiring structures with dummy metal features and methods of manufacture are disclosed. A structure includes a metal wiring structure, and dummy metal features in electrical and direct physical contact with the metal wiring structure in a same plane as the metal wiring structure. The dummy metal features do not change a resistance of the metal wiring structure and are remote from other structures.

Abstract: A through silicon via (TSV), method and 3D integrated circuit are disclosed. The TSV extends through a substrate to a back side of the substrate and includes a body including a first metal for coupling to an interconnect on a front side of the substrate. A dielectric collar insulates the body from the substrate. The TSV also includes an end cap coupled to the body on the back side of the substrate, the end cap including a second metal that is different than the first metal. The end cap acts as a grinding stop indicator during back side grinding for 3D integration processing, preventing damage to the dielectric collar and first metal (e.g., copper) contamination of the substrate.

Abstract: A system and associated method for optimizing process of a purchase order of a Learning Management System (LMS) course for at least one student. The method creates a course data file from a course record stored in a database, and an order data file from an applicant order for a purchase of the LMS course. The course record and the applicant order are associated via a sale course code that represents specifics of the purchase of the LMS course. A quantity of the applicant order indicates a number of students for whom the LMS course purchased. If the quantity is greater than one, an access code is created for an interactive enrollment by each student in the applicant order. Even if the quantity is one, when a student e-mail address is not provided, the access code is produced to enable the individual student to interactively enroll in the LMS course.

Abstract: A system and associated method for automatically registering at least one applicant for a respective Learning Management System (LMS) course. The method creates a course data file from a course record stored in a database, and an order data file from an applicant order for a purchase of a LMS course. The course record and the applicant order are associated via a sale course code that represents specifics of the purchase of the LMS course. The method enrolls an individual student in the LMS course identified in the applicant order by registering the individual student with a corresponding user record in the database and updates transaction logs in the database according to a result of the enrollment.

Abstract: Method for prescriptive learning. The method includes providing a user independent hierarchy of competencies, competency characteristics and assessments with associated rules that identify learning activities and identifying a user specific path through the hierarchy for a selected competency and competency characteristic based on the hierarchy, scoring of at least one question associated with at least one assessment associated with the selected competency characteristic. The rules and user specific information provide a user specific identification of learning activities.

Abstract: A test chip module for testing the integrity of the flp chip solder ball interconnections between chip and substrate. The interconnections, are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

Abstract: A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.

Abstract: A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.