Patents by Inventor Charlie Chueh

Charlie Chueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7314788
    Abstract: An apparatus including, in one embodiment, a CMOS device cell including at least first and second CMOS transistors having first and second CMOS transistor doped regions in first and second doped wells, respectively, wherein each of the first and second CMOS transistor doped regions is configured to be biased with a corresponding one of a power supply potential and a ground potential. Such an embodiment also includes a tap cell having first and second tap cell doped regions in the first and second doped wells, respectively, wherein each of the first and second tap cell doped regions is configured to be biased with a different potential relative to the power supply and ground potential.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: January 1, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hao Shaw, Chih Hung Wu, Charlie Chueh
  • Patent number: 7115460
    Abstract: An apparatus including, in one embodiment, a CMOS device cell including at least first and second CMOS transistors having first and second CMOS transistor doped regions in first and second doped wells, respectively, wherein each of the first and second CMOS transistor doped regions is configured to be biased with a corresponding one of a power supply potential and a ground potential. Such an embodiment also includes a tap cell having first and second tap cell doped regions in the first and second doped wells, respectively, wherein each of the first and second tap cell doped regions is configured to be biased with a different potential relative to the power supply and ground potential.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: October 3, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hao Shaw, Chih Hung Wu, Charlie Chueh
  • Publication number: 20060134853
    Abstract: An apparatus including, in one embodiment, a CMOS device cell including at least first and second CMOS transistors having first and second CMOS transistor doped regions in first and second doped wells, respectively, wherein each of the first and second CMOS transistor doped regions is configured to be biased with a corresponding one of a power supply potential and a ground potential. Such an embodiment also includes a tap cell having first and second tap cell doped regions in the first and second doped wells, respectively, wherein each of the first and second tap cell doped regions is configured to be biased with a different potential relative to the power supply and ground potential.
    Type: Application
    Filed: February 9, 2006
    Publication date: June 22, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hao Shaw, Chih Wu, Charlie Chueh
  • Publication number: 20050051801
    Abstract: An apparatus including, in one embodiment, a CMOS device cell including at least first and second CMOS transistors having first and second CMOS transistor doped regions in first and second doped wells, respectively, wherein each of the first and second CMOS transistor doped regions is configured to be biased with a corresponding one of a power supply potential and a ground potential. Such an embodiment also includes a tap cell having first and second tap cell doped regions in the first and second doped wells, respectively, wherein each of the first and second tap cell doped regions is configured to be biased with a different potential relative to the power supply and ground potential.
    Type: Application
    Filed: August 20, 2004
    Publication date: March 10, 2005
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hao Shaw, Chih Wu, Charlie Chueh