Patents by Inventor Chau C. Tran

Chau C. Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9252725
    Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: February 2, 2016
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Derek Bowers, Oljeta Bida Qirko, Chau C Tran
  • Publication number: 20140104000
    Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 17, 2014
    Applicant: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Derek Frederick Bowers, Oljeta Bida Qirko, Chau C. Tran
  • Patent number: 7495426
    Abstract: A temperature setpoint circuit comprises bipolar transistors Q1 and Q2 which receive currents I1 and I2 at their respective collectors and are operated at unequal current densities, with a resistance R1 connected between their bases such that the difference in their base-emitter voltages (?Vbe) appears across R1. An additional PTAT current I3 is maintained in a constant ratio to I1 and I2 and provided to the collector of Q2 while Q2 is off, and is not provided while Q2 is on. The circuit is arranged such that Q2 is turned on and conducts a current equal to Ia when: ?Vbe=(kT/q)ln(NI1/Ia), where Ia=I2+I3, the temperature T at which ?Vbe=(kT/q)ln(NI1/Ia) being the circuit's setpoint temperature, such that the switching of current I3 provides hysteresis for the setpoint temperature which is approximately constant over temperature.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: February 24, 2009
    Assignee: Analog Devices, Inc.
    Inventors: Chau C. Tran, A. Paul Brokaw
  • Patent number: 7436052
    Abstract: A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: October 14, 2008
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Chau C. Tran
  • Patent number: 7265615
    Abstract: A multiple differential amplifier system and method for transconductance mismatch compensation which in a first phase connects to a differential switched input of a null amplifier, the differential signal input of the main amplifier, inverted, for compensating for offset errors and transconductance mismatches in the null amplifier; and storing in a null storage device connected to an auxiliary input of the null amplifier the output of the null amplifier representing the compensation for the offset error and transconductance mismatch of the null amplifier; and in a second phase connecting the differential switched input of the null amplifier to the differential feedback input of the main amplifier and storing in the main storage device connected to an auxiliary input of the main amplifier the output of the null amplifier representing the compensation for the main amplifier offset error and transconductance mismatch.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 4, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Alasdair G. Alexander, Chau C. Tran
  • Patent number: 7208930
    Abstract: A bandgap voltage regulator is arranged such that, when a desired output voltage is present between its output and common terminals, current densities in a pair of bipolar transistors having unequal emitter areas are maintained in a fixed ratio. The difference in the transistors' base-emitter voltages is across a resistor, which thus conducts a PTAT current. The regulator also generates a CTAT current, and both the PTAT and CTAT currents are made to flow in another resistor, with the resulting voltages added by superposition. The regulator's resistors are sized such that Vout is an integral or fractional multiple of Vbg, where Vbg is the bandgap voltage for the fabrication process used to make the regulator's transistors, such that Vout is temperature invariant, to a first order. The resistors are preferably realized using unit resistors having a predetermined resistance, or series and/or parallel combinations of unit resistors.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: April 24, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Chau C. Tran, A. Paul Brokaw
  • Patent number: 6876070
    Abstract: A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: April 5, 2005
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Chau C. Tran
  • Patent number: 6549070
    Abstract: A high gain amplifier includes an intermediate gain stage; an output gain stage driven by the intermediate gain stage; an input stage, for driving the intermediate gain stage, which is balanced between positive and negative feedback in normal operation; bias means for driving the input stage to maintain balance between positive and negative feedback in normal operation; and a resistance for limiting the output current of the intermediate stage in response to the input stage being overdriven into positive feedback.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: April 15, 2003
    Assignee: Analog Devices, Inc.
    Inventors: Chau C. Tran, Adrian Paul Brokaw
  • Patent number: 6483382
    Abstract: A current compensation circuit for an amplifier, for example an operational amplifier, having input and output stages coupled at a high-impedance node, compensates for any modulation of current occurring at the high-impedance node. Particularly, the compensation circuit of the present invention reduces the error current at the high-impedance node resulting from a mismatch in beta between PNP and NPN transistors in the output stage, and reduces any error current resulting from the Early voltage effects of transistors in the output stage. In this manner, the present invention serves to substantially isolate the amplifier input stage from the output load, and from any beta mismatch or Early voltage effects in the transistors of the output stage, resulting in greatly improved open-loop gain.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: November 19, 2002
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Chau C. Tran, Mark Fazio
  • Patent number: 6275034
    Abstract: A semiconductor magnetic field sensor including a substrate; a semiconductor moveable element suspended above the substrate, the moveable element being configured to have a current passed therethrough and to deflect perpendicularly with respect to an applied magnetic field; and at least one fixed semiconductor element arranged adjacent to the moveable element, the moveable element being deflected to or away from the fixed element in response to an applied magnetic field.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: August 14, 2001
    Assignee: Analog Devices Inc.
    Inventors: Chau C. Tran, John A. Geen, A. Paul Brokaw, Geoffrey T. Haigh