Patents by Inventor Chau Chin Low
Chau Chin Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11387583Abstract: A connector includes a flexible connector having a first plurality of solder bumps arranged in a first pattern, and a base connector having a second plurality of solder bumps arranged in a second pattern concentric with and of a different size than the first pattern. A method of interconnecting a flexible connector to a base connector includes providing the flexible connector with a first plurality of solder bumps arranged in a first pattern, and providing the base connector with a second plurality of solder bumps arranged in a second pattern. The flexible and base connectors are aligned by aligning the first and second pluralities of solder bumps.Type: GrantFiled: September 17, 2020Date of Patent: July 12, 2022Assignee: SEAGATE TECHNOLOGY LLCInventors: Brian Lee Burski, Ted R. McDonald, Chau Chin Low
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Publication number: 20220085534Abstract: A connector includes a flexible connector having a first plurality of solder bumps arranged in a first pattern, and a base connector having a second plurality of solder bumps arranged in a second pattern concentric with and of a different size than the first pattern. A method of interconnecting a flexible connector to a base connector includes providing the flexible connector with a first plurality of solder bumps arranged in a first pattern, and providing the base connector with a second plurality of solder bumps arranged in a second pattern. The flexible and base connectors are aligned by aligning the first and second pluralities of solder bumps.Type: ApplicationFiled: September 17, 2020Publication date: March 17, 2022Inventors: Brian Lee Burski, Ted R. McDonald, Chau Chin Low
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Patent number: 9930789Abstract: The steps of forming a multi-layer flexible printed circuit cable (flex circuit) with an electrical interconnection between independent conductive layers. In accordance with various embodiments, a partial aperture is formed in the flex circuit that extends through a first conductive layer and an intervening insulative layer to an underlying surface of a second conductive layer that spans the partial aperture. A solder material is reflowed within the partial aperture to electrically interconnect the first and second conductive layers.Type: GrantFiled: April 12, 2010Date of Patent: March 27, 2018Assignee: Seagate Technology LLCInventor: Chau-Chin Low
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Patent number: 9747934Abstract: Systems and methods for a flexible dynamic loop having reduced impedance are described. The flexible dynamic loop may supply current from a preamplifier to another device, such as a hard disk drive. In one embodiment, a flexible dynamic loop comprises a flexible structure having a set of wire traces. The flexible dynamic loop may also comprise a set of impedance control structures on the flexible structure and perpendicular to a bend radius of the flexible structure, wherein the set of impedance control structures change an impedance level experienced by at least some of the set of wire traces. Some of the impedance control structures may be staggered. The flexible dynamic loop may also include a cover layer formed over the set of impedance control structures, which may be patterned with perforations. The flexible dynamic loop may also include one or more flexible rails connecting some of the impedance control structures.Type: GrantFiled: September 13, 2016Date of Patent: August 29, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: Todd M. Lammers, Andrew R. Motzko, Chau Chin Low, Matthew S. Graeff
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Patent number: 9468126Abstract: Apparatus for retracting and extending sets of operational processing devices in a multi-device enclosure. In accordance with some embodiments, an enclosed housing is provided with opposing first and second ends. Sleds are individually movable between a retracted position within the enclosed housing and an extended position in which the sled projects from the first end. Each sled supports a group of processing devices. A control board is disposed within the enclosed housing adjacent the second end. A plurality of flex circuits contactingly engage the processing devices to provide communication paths between the processing devices and the control board in both the retracted and extended positions of the sleds.Type: GrantFiled: November 11, 2013Date of Patent: October 11, 2016Assignee: Seagate Technology LLCInventors: Anthony John Pronozuk, Shawn Jacob Noland, James Edward Dykes, William Leon Rugg, Chau Chin Low
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Publication number: 20140362515Abstract: Apparatus for retracting and extending sets of operational processing devices in a multi-device enclosure. In accordance with some embodiments, an enclosed housing is provided with opposing first and second ends. Sleds are individually movable between a retracted position within the enclosed housing and an extended position in which the sled projects from the first end. Each sled supports a group of processing devices. A control board is disposed within the enclosed housing adjacent the second end. A plurality of flex circuits contactingly engage the processing devices to provide communication paths between the processing devices and the control board in both the retracted and extended positions of the sleds.Type: ApplicationFiled: November 11, 2013Publication date: December 11, 2014Applicant: Seagate Technology LLCInventors: Anthony John Pronozuk, Shawn Jacob Noland, James Edward Dykes, William Leon Rugg, Chau Chin Low
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Publication number: 20110247862Abstract: A multi-layer flexible printed circuit cable (flex circuit) with an electrical interconnection between independent conductive layers, and a method for forming the same. In accordance with various embodiments, a partial aperture is formed in the flex circuit that extends through a first conductive layer and an intervening insulative layer to an underlying surface of a second conductive layer that spans the partial aperture. A solder material is reflowed within the partial aperture to electrically interconnect the first and second conductive layers.Type: ApplicationFiled: April 12, 2010Publication date: October 13, 2011Applicant: Seagate Technology LLCInventor: Chau-Chin Low
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Publication number: 20050212144Abstract: Disclosed is a method and apparatus for stacking dice including multi-chip packaging with additional non stacked dice. The stacked dice have at least one electrical connection located on a single surface and oriented in the same direction when stacked. These dice are stacked, offset and coupled electrically. In an embodiment, the stacked dice have a buffer function, such as an SDRAM device, and are included in a multi-chip package (MCP) with an additional die including a channel function and a controller function thereon. The dice are packaged in a single package for placement on a printed circuit board for use in a storage device such as a disc drive.Type: ApplicationFiled: March 25, 2004Publication date: September 29, 2005Inventors: William Rugg, Robert Warren, Chau-Chin Low
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Patent number: 6849480Abstract: Packaged surface mount (SMT) chips having matched top contacts and bottom contacts are stacked. Chip features are selected to provide the desired connectivity between chip layers with a greater ease of manufacture. In one embodiment, additional spacing and routing layers are optionally provided between layers. In another, chips are differentiated by optionally providing different conductor and/or nonvolatile cell configurations. In yet another, a minority of a substrate's contacts are configured for aligning with a dielectric region of a spacing layer or substrate to create very low capacitance signal paths between stacked chips.Type: GrantFiled: October 26, 1999Date of Patent: February 1, 2005Assignee: Seagate Technology LLCInventors: Chau Chin Low, Oscar Woo, Michael R. Fabry, Terry A. Junge, Tiang Fee Yin, Choon An Aw, Jonathan E. Olson
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Patent number: 5783370Abstract: An assembly for high volume production of printed circuit cables consisting of: a plurality of printed circuit cables 10 cut from a polyimide base sheet 30 coated with a layer of copper and further coated with a photo-imaging material layer, wherein copper layer and photo-imaging material layer are photo-etched away at certain locations, a cover layer 34 applied on top of said printed circuit cables 10, cover layer 34 extending laterally from printed circuit cables 10, and forming tabs 16 at a plurality of locations, and a panel 20 having a plurality of apertures 15 cut therein, apertures 15 each dimensioned to receive a printed circuit cable 10 therein, and tabs 16 being connected to panel 20. A worknest 50 having certain areas 52 raised to different heights, worknest 50 adapted to be positioned under and provide support to the plurality of printed circuit cables 10. A cutting device 60 being adapted to cut tabs 16 thereby enabling printed circuit cables 10 to be removed from panel 20.Type: GrantFiled: July 24, 1996Date of Patent: July 21, 1998Assignee: Seagate Technology, Inc.Inventors: John Michael Groom, Chau Chin Low