Patents by Inventor Che Chung Roy Li

Che Chung Roy Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080180414
    Abstract: A method of driving an LED includes determining an operational parameter of the LED, determining a driving signal parameter for the LED, and generating a periodic driving signal for driving the LED. The generated periodic driving signal has a duty cycle that depends on the determined driving signal parameter and the determined operational parameter of the LED.
    Type: Application
    Filed: January 30, 2007
    Publication date: July 31, 2008
    Inventors: Kai Ming Fung, Chin Tung Derek Lau, Che Chung Roy Li, Chong Yiu Dennis Lui
  • Patent number: 6133100
    Abstract: A compact ROM array is formed in a single active region (5) bounnded by field oxide regions, the array being formed of one or more ROM banks (6, 7). Each ROM bank has a plurality of pairs of N+ bit lines (1-1 to 4-2), a plurality of conductive word lines (15-1 to 16-2) formed on top of, and perpendicular to, the bit lines, and left-select (11) and right-select (12-1, 12-2) lines arranged parallel to the word lines to enable particular transistor cells in the array to be selected to be read. The transistor cells (40, 41) are formed by adjacent portions of adjacent bit lines together with the portion of the word line extending between them. Isolation regions (43) between the transistor cells are formed by implanting the substrate between them with Boron dopant of a low energy and concentration after the bit and word lines have been fabricated and the transistor cells are programmed by implanting a channel region (42) with Boron of a higher energy and concentration after the low energy implantation step.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: October 17, 2000
    Assignee: Motorola, Inc.
    Inventor: Che Chung Roy Li
  • Patent number: 5929494
    Abstract: A compact ROM array is formed in a single active region (5) bounded by field oxide regions, the array being formed of one or more ROM banks (6, 7). Each ROM bank has a plurality of pairs of N+ bit lines (1-1 to 4-2), a plurality of conductive word lines (15-1 to 16-2) formed on top of, and perpendicular to, the bit lines, and left-select (11) and right-select (12-1, 12-2) lines arranged parallel to the word lines to enable particular transistor cells in the array to be selected to be read. The transistor cells (40, 41) are formed by adjacent portions of adjacent bit lines together with the portion of the word line extending between them. Isolation regions (43) between the transistor cells are formed by implanting the substrate between them with Boron dopant of a low energy and concentration after the bit and word lines have been fabricated and the transistor cells are programmed by implanting a channel region (42) with Boron of a higher energy and concentration after the low energy implantation step.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventor: Che Chung Roy Li