Patents by Inventor Chee Chiew Chong

Chee Chiew Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11239127
    Abstract: A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Edward Myers, Liu Chen, Chee Chiew Chong, Wee Aun Jason Lim, Wee Boon Tay
  • Publication number: 20210398867
    Abstract: A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Inventors: Edward MYERS, Liu CHEN, Chee Chiew CHONG, Wee Aun Jason LIM, Wee Boon TAY
  • Publication number: 20210313294
    Abstract: A semiconductor package includes a carrier having a recess, a semiconductor die arranged on the carrier such that a first side of the semiconductor die faces the carrier, and a contact clip arranged over a second side of the semiconductor die, opposite the first side. The contact clip includes a lowered part. The lowered part is arranged in the recess.
    Type: Application
    Filed: March 24, 2021
    Publication date: October 7, 2021
    Inventors: Chau Fatt Chiang, Xavier Arokiasamy, Naveendran Chellamuthu, Chee Chiew Chong, Joo Ming Goa, Chee Hong Lee, Muhammat Sanusi Muhammad, Chee Voon Tan, Wee Boon Tay