Patents by Inventor Chee Peng Neo
Chee Peng Neo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230378209Abstract: Implementations of an image sensor package may include an image sensor die including at least one bond pad thereon; a bond wire wirebonded to the at least one bond pad; and an optically transmissive lid coupled to the image sensor die with an optically opaque film adhesive over the at least one bond pad. The bond wire may extend through the optically opaque film adhesive to the at least one bond pad.Type: ApplicationFiled: May 19, 2022Publication date: November 23, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Chee Peng NEO, Yu-Te HSIEH
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Patent number: 8476109Abstract: Semiconductor workpiece carriers and methods for processing semiconductor workpieces are disclosed herein. In one embodiment, a semiconductor workpiece carrier assembly includes (a) a support structure having an opening sized to receive at least a portion of a semiconductor workpiece, and (b) a replaceable carrier positioned at the opening. The replaceable carrier includes a base and an adhesive layer on the base. The base has a surface, and the adhesive layer covers only a section of the surface of the base. The adhesive layer releasably attaches the replaceable carrier to the support structure.Type: GrantFiled: April 26, 2011Date of Patent: July 2, 2013Assignee: Micron Technology, Inc.Inventors: Chee Peng Neo, Hong Hak Teo, Jamilon Bin Sukami
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Patent number: 8373277Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: January 28, 2008Date of Patent: February 12, 2013Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Publication number: 20110287581Abstract: Semiconductor workpiece carriers and methods for processing semiconductor workpieces are disclosed herein. In one embodiment, a semiconductor workpiece carrier assembly includes (a) a support structure having an opening sized to receive at least a portion of a semiconductor workpiece, and (b) a replaceable carrier positioned at the opening. The replaceable carrier includes a base and an adhesive layer on the base. The base has a surface, and the adhesive layer covers only a section of the surface of the base. The adhesive layer releasably attaches the replaceable carrier to the support structure.Type: ApplicationFiled: April 26, 2011Publication date: November 24, 2011Applicant: Micron Technology, Inc.Inventors: Chee Peng Neo, Hong Hak Teo, Jamilon Bin Sukami
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Patent number: 8011513Abstract: Semiconductor workpiece carriers and methods for processing semiconductor workpieces are disclosed herein. In one embodiment, a semiconductor workpiece carrier assembly includes (a) a support structure having an opening sized to receive at least a portion of a semiconductor workpiece, and (b) a replaceable carrier positioned at the opening. The replaceable carrier includes a base and an adhesive layer on the base. The base has a surface, and the adhesive layer covers only a section of the surface of the base. The adhesive layer releasably attaches the replaceable carrier to the support structure.Type: GrantFiled: April 30, 2007Date of Patent: September 6, 2011Assignee: Micron Technology, Inc.Inventors: Chee Peng Neo, Hong Hak Teo, Jamilon Bin Sukami
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Patent number: 7799610Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided.Type: GrantFiled: October 15, 2007Date of Patent: September 21, 2010Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7691680Abstract: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, at least two leads, and at least two bond wires. Each of the leads may have a reduced-thickness inner length adjacent terminals of the microelectronic component and a body having an outer surface spaced farther from the microelectronic component than a bond surface of the inner length. Each of the bond wires couples the microelectronic component to one of the leads and has a maximum height outwardly from the microelectronic component that is no greater than the height of the outer surface of the lead.Type: GrantFiled: April 23, 2008Date of Patent: April 6, 2010Assignee: Micron Technologies, Inc.Inventors: Chee Peng Neo, Hock Chuan Tan, Beng Chye Chew, Yih Ming Chai, Kian Shing Tan
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Patent number: 7575953Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: December 18, 2007Date of Patent: August 18, 2009Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Publication number: 20080261383Abstract: Semiconductor workpiece carriers and methods for processing semiconductor workpieces are disclosed herein. In one embodiment, a semiconductor workpiece carrier assembly includes (a) a support structure having an opening sized to receive at least a portion of a semiconductor workpiece, and (b) a replaceable carrier positioned at the opening. The replaceable carrier includes a base and an adhesive layer on the base. The base has a surface, and the adhesive layer covers only a section of the surface of the base. The adhesive layer releasably attaches the replaceable carrier to the support structure.Type: ApplicationFiled: April 30, 2007Publication date: October 23, 2008Applicant: Micron Technology, Inc.Inventors: Chee Peng Neo, Hong Hak Teo, Jamilon Bin Sukami
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Publication number: 20080136045Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: ApplicationFiled: January 28, 2008Publication date: June 12, 2008Applicant: MICRON TECHNOLOGY, INC.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7371608Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: March 14, 2003Date of Patent: May 13, 2008Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7358117Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: August 29, 2006Date of Patent: April 15, 2008Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7344969Abstract: Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recessed edge along the perimeter of the bottom surface to provide clearance for a bonding element extending from bond pads on the first die to pads on the substrate, thus eliminating the need for a spacer between the two dies. In another embodiment, the second die is at least partially disposed within a recess in the upper surface of the first die. In another embodiment, an adhesive element is disposed within a recess in the bottom surface of the first die for attaching the first die to the substrate. In yet another embodiment, the first die is at least partially disposed within a recess within the bottom surface of the second die. The stacked die assemblies can be encapsulated to form semiconductor packages.Type: GrantFiled: April 28, 2003Date of Patent: March 18, 2008Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7332819Abstract: Semiconductor devices and stacked die assemblies, are provided which have at least two semiconductor dies disposed on a substrate in a stacked arrangement, the first and second dies having first surfaces having bond pads, the second die having a second surface with a recessed edge portion along a perimeter of that die, and the recessed edge portion having a height sufficient for clearance of bonding elements extending from the first die.Type: GrantFiled: February 5, 2002Date of Patent: February 19, 2008Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7332820Abstract: Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recessed edge along the perimeter of the bottom surface to provide clearance for a bonding element extending from bond pads on the first die to pads on the substrate, thus eliminating the need for a spacer between the two dies. In another embodiment, the second die is at least partially disposed within a recess in the upper surface of the first die. In another embodiment, an adhesive element is disposed within a recess in the bottom surface of the first die for attaching the first die to the substrate. In yet another embodiment, the first die is at least partially disposed within a recess within the bottom surface of the second die. The stacked die assemblies can be encapsulated to form semiconductor packages.Type: GrantFiled: April 28, 2003Date of Patent: February 19, 2008Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7309623Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: August 29, 2006Date of Patent: December 18, 2007Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7282390Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided. In an embodiment of the methods, a second die is mounted on a first die which is at least partially received within a recess of the second die and an overall height of the dies within the device is less than a combined height of the dies.Type: GrantFiled: May 25, 2006Date of Patent: October 16, 2007Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7282392Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.Type: GrantFiled: August 29, 2006Date of Patent: October 16, 2007Assignee: Micron Technology, Inc.Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
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Patent number: 7213447Abstract: An apparatus and method for detecting characteristics of a microelectronic substrate. The microelectronic substrate can have a first surface with first topographical features, such as roughness elements, and a second surface facing opposite from the first surface and having second topographical features, such as protruding conductive structures. In one embodiment, the apparatus can include a support member configured to carry the microelectronic substrate with a first portion of the first surface exposed and a second portion of the second surface exposed. The apparatus can further include a topographical feature detector positioned proximate to support member and aligned with the first portion of the first surface of the microelectronic substrate to detect characteristics, such as a roughness, of the first surface while the microelectronic substrate is carried by the support member.Type: GrantFiled: June 20, 2005Date of Patent: May 8, 2007Assignee: Micron Technology, Inc.Inventors: Chee Peng Neo, Cher Khng Victor Tan, Kian Seng Ho, Hock Chuan Tan
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Patent number: 6923045Abstract: An apparatus and method for detecting characteristics of a microelectronic substrate. The microelectronic substrate can have a first surface with first topographical features, such as roughness elements, and a second surface facing opposite from the first surface and having second topographical features, such as protruding conductive structures. In one embodiment, the apparatus can include a support member configured to carry the microelectronic substrate with a first portion of the first surface exposed and a second portion of the second surface exposed. The apparatus can further include a topographical feature detector positioned proximate to support member and aligned with the first portion of the first surface of the microelectronic substrate to detect characteristics, such as a roughness, of the first surface while the microelectronic substrate is carried by the support member.Type: GrantFiled: July 15, 2004Date of Patent: August 2, 2005Assignee: Micron Technology, Inc.Inventors: Chee Peng Neo, Cher Khng Victor Tan, Kian Seng Ho, Hock Chuan Tan