Patents by Inventor Chee Yee Kwok

Chee Yee Kwok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9401346
    Abstract: An optical bus of an integrated circuit comprises: a polymer waveguide, a micromirror, and an optical coupler. The polymer waveguide is disposed in a via formed through at least one die layer of the integrated circuit comprising an active circuit. The micromirror is disposed adjacent to the via and optically coupled to the polymer waveguide. The optical coupler is connected to the polymer waveguide to couple the active circuit to the optical bus. A stacked integrated circuit is described comprising such an optical bus. A method of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: July 26, 2016
    Inventors: Chee Yee Kwok, Aron Michael, Yiwei Xu
  • Publication number: 20150206856
    Abstract: An optical bus of an integrated circuit comprises: a polymer waveguide, a micromirror, and an optical coupler. The polymer waveguide is disposed in a via formed through at least one die layer of the integrated circuit comprising an active circuit. The micromirror is disposed adjacent to the via and optically coupled to the polymer waveguide. The optical coupler is connected to the polymer waveguide to couple the active circuit to the optical bus. A stacked integrated circuit is described comprising such an optical bus. A method of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.
    Type: Application
    Filed: January 9, 2015
    Publication date: July 23, 2015
    Inventors: Chee Yee KWOK, Aron MICHAEL, Yiwei XU
  • Patent number: 8958667
    Abstract: An optical bus (130) of an integrated circuit (100) comprises: a polymer waveguide (112), a micromirror (114, 116), and an optical coupler (120). The polymer waveguide (112) is disposed in a via (110) formed through at least one die layer (102, 104, 106) of the integrated circuit (100) comprising an active circuit (210). The micromirror (114) is disposed adjacent to the via (110) and optically coupled to the polymer waveguide (112). The optical coupler (120) is connected to the polymer waveguide (112) to couple the active circuit (210) to the optical bus (130). A stacked integrated circuit (100) is described comprising such an optical bus (130). A method (800) of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus (130) is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.
    Type: Grant
    Filed: July 4, 2011
    Date of Patent: February 17, 2015
    Inventors: Chee Yee Kwok, Aron Michael, Yiwei Xu
  • Patent number: 8866364
    Abstract: Disclosed is a piezo-electrically actuated micro-mechanical deformable member comprising a corrugated longitudinal beam (521) formed in a substrate, and having a first anchored end (502) and a second end (509), as well as a plurality of piezoelectric film (PZET) actuating segments (522, 523, 524) formed in or on at least some grooves and ridges of the corrugated beam, the beam (521) being configured to assume one of a number of different geometric configurations depending upon which of a corresponding set of electric actuation signals (105) are applied to the PZET elements, the electric actuation signals establishing corresponding electric fields in the associated PZET segments to thereby deform the member.
    Type: Grant
    Filed: July 4, 2011
    Date of Patent: October 21, 2014
    Inventors: Aron Michael, Chee Yee Kwok
  • Publication number: 20130114149
    Abstract: Disclosed is a piezo-electrically actuated micro-mechanical deformable member comprising a corrugated longitudinal beam (521) formed in a substrate, and having a first anchored end (502) and a second end (509), as well as a plurality of piezoelectric film (PZET) actuating segments (522, 523, 524) formed in or on at least some grooves and ridges of the corrugated beam, the beam (521) being configured to assume one of a number of different geometric configurations depending upon which of a corresponding set of electric actuation signals (105) are applied to the PZET elements, the electric actuation signals establishing corresponding electric fields in the associated PZET segments to thereby deform the member.
    Type: Application
    Filed: July 4, 2011
    Publication date: May 9, 2013
    Inventors: Aron Michael, Chee Yee Kwok
  • Publication number: 20130108211
    Abstract: An optical bus (130) of an integrated circuit (100) comprises: a polymer waveguide (112), a micromirror (114, 116), and an optical coupler (120). The polymer waveguide (112) is disposed in a via (110) formed through at least one die layer (102, 104, 106) of the integrated circuit (100) comprising an active circuit (210). The micromirror (114) is disposed adjacent to the via (110) and optically coupled to the polymer waveguide (112). The optical coupler (120) is connected to the polymer waveguide (112) to couple the active circuit (210) to the optical bus (130). A stacked integrated circuit (100) is described comprising such an optical bus (130). A method (800) of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus (130) is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.
    Type: Application
    Filed: July 4, 2011
    Publication date: May 2, 2013
    Inventors: Chee Yee Kwok, Aron Michael, Yiwei Xu
  • Patent number: 5864255
    Abstract: A four quadrant multiplier using multiple input floating-gate MOS transistors is provided. It is based on the square law characteristics of the MOS transistor and can be realised with only four floating gate MOS transistors, two resistors and a current source. The four floating gate transistors are configured with their sources connected in common and biased by a single current source. Output is taken between two common drain connections. Each transistor has three control gates with two being provided for selected ones of the two input signals and one for a biasing signal (optional). Input signals can be connected to the control gates in either a differential or single ended configuration. In one application, a programmable synaptic cell for neural networks employs the multi-input floating-gate MOS four-quadrant analog multiplier. Varying of the neural weight connection strength of each synaptic cell is achieved by two possible methods.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: January 26, 1999
    Assignee: Unisearch Limited
    Inventors: Chee Yee Kwok, Hamid Reza Mehrvarz