Patents by Inventor Chen-Fu Lee

Chen-Fu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162109
    Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.
    Type: Application
    Filed: January 10, 2023
    Publication date: May 16, 2024
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Kuo-Chung Yee, Yu-Jen Lien, Ke-Han Shen, Wei-Kong Sheng, Chung-Shi Liu, Szu-Wei Lu, Tsung-Fu Tsai, Chung-Ju Lee, Chih-Ming Ke
  • Patent number: 11978720
    Abstract: A method includes attaching a die to a thermal compression bonding (TCB) head through vacuum suction, wherein the die comprises a plurality of conductive pillars, attaching a first substrate to a chuck through vacuum suction, wherein the first substrate comprises a plurality of solder bumps, contacting a first conductive pillar of the plurality of conductive pillars to a first solder bump of the plurality of solder bumps, wherein contacting the first conductive pillar to the first solder bump results in a first height between a topmost surface of the first conductive pillar and a bottommost surface of the first solder bump, and adhering the first solder bump to the first conductive pillar to form a first joint, wherein adhering the first solder bump to the first conductive pillar comprises heating the TCB head.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kai Jun Zhan, Chin-Fu Kao, Kuang-Chun Lee, Ming-Da Cheng, Chen-Shien Chen
  • Patent number: 11967563
    Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Patent number: 6104605
    Abstract: A cover structure for a notebook computer includes a base casing shaped as a flat box having a front face and a lower side each defining an opening, an LCD being slid and received in the base casing as a drawer from the opening of the lower side of the base casing, and a fixing plate to be combined with the base casing so that the LCD is fixed therebetween. The cover structure is slim, can be easily produced and easily assembled.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: August 15, 2000
    Assignee: Yen-Chi Hsieh
    Inventor: Chen-Fu Lee