Patents by Inventor Chen-Fu Tsai
Chen-Fu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170381Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.Type: ApplicationFiled: February 1, 2024Publication date: May 23, 2024Inventors: Chun-Hsien HUANG, Peng-Fu HSU, Yu-Syuan CAI, Min-Hsiu HUNG, Chen-Yuan KAO, Ken-Yu CHANG, Chun-I TSAI, Chia-Han LAI, Chih-Wei CHANG, Ming-Hsing TSAI
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Publication number: 20240162109Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.Type: ApplicationFiled: January 10, 2023Publication date: May 16, 2024Inventors: Hung-Yi Kuo, Chen-Hua Yu, Kuo-Chung Yee, Yu-Jen Lien, Ke-Han Shen, Wei-Kong Sheng, Chung-Shi Liu, Szu-Wei Lu, Tsung-Fu Tsai, Chung-Ju Lee, Chih-Ming Ke
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Publication number: 20240153916Abstract: A semiconductor device includes a bottom semiconductor die including a bottom semiconductor die sidewall, a top semiconductor die bonded to the bottom semiconductor die and including a top semiconductor die sidewall, and a molding material layer formed on an upper surface of the bottom semiconductor die, on the top semiconductor die sidewall, and on the bottom semiconductor die sidewall. A method of forming a semiconductor device includes mounting a bottom semiconductor die including a bottom semiconductor die sidewall on a carrier substrate, mounting a top semiconductor die including a top semiconductor die sidewall on the bottom semiconductor die, and forming a molding material layer on an upper surface of the bottom semiconductor die, on the top semiconductor die sidewall, and on the bottom semiconductor die sidewall.Type: ApplicationFiled: April 21, 2023Publication date: May 9, 2024Inventors: Tsung-Fu TSAI, Chen-Hua YU, Szu-Wei LU
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Publication number: 20240153943Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: ApplicationFiled: January 5, 2024Publication date: May 9, 2024Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Publication number: 20240114703Abstract: A package structure and a formation method are provided. The method includes providing a semiconductor substrate and bonding a first chip structure on the semiconductor substrate through metal-to-metal bonding and dielectric-to-dielectric bonding. The method also includes bonding a second chip structure over the semiconductor substrate through solder-containing bonding structures. The method further includes forming a protective layer surrounding the second chip structure. A portion of the protective layer is between the semiconductor substrate and a bottom of the second chip structure.Type: ApplicationFiled: February 2, 2023Publication date: April 4, 2024Inventors: Tsung-Fu TSAI, Szu-Wei LU, Shih-Peng TAI, Chen-Hua YU
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Publication number: 20240105629Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsuan Tsai, Chin-Chuan Chang, Szu-Wei Lu, Tsung-Fu Tsai
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Patent number: 11929314Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.Type: GrantFiled: March 12, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11916060Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.Type: GrantFiled: June 21, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
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Patent number: 7943882Abstract: A sealing apparatus comprises a circulating channel for a wire cutting machine, and the sealing apparatus further includes a channel at the position of a lower arm in the fluid tank for injecting a liquid, and a sealing O-ring installed at the sealing apparatus for preventing a leak of liquid, such that a circulating channel is formed around the periphery of the lower arm. The liquid is injected through an injecting inlet into the circulating channel such that the centrifugal force produced by the whirling flow can wash away the debrises attached on the lower arm, and discharge the debrises from a discharge opening to the outside.Type: GrantFiled: November 20, 2007Date of Patent: May 17, 2011Assignee: Accutex Technologies Co., Ltd.Inventor: Chen-Fu Tsai
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Publication number: 20100277853Abstract: A waterproof structure in a tank. The circuit board required for discharge machining in the tank is disposed outside the tank. The inner wall of the tank is provided with a waterproof component with a downward opening. The circuit board along with other elements is connected to an electrode contact disposed in the waterproof component. When the machining liquid is full, the air pressure in the air storage space of the waterproof component balances with the liquid pressure at the opening. This prevents the machining liquid from spilling onto the electrode contact and resulting in the bypassing circuit effect. Moreover, the waterproof component can be used at the electrode contact of each base of the conductive platform, providing the same protection.Type: ApplicationFiled: September 26, 2008Publication date: November 4, 2010Inventors: Chen-Fu TSAI, Chien-Hua Hu
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Publication number: 20090127798Abstract: The present invention discloses a sealing apparatus having a circulating channel for a wire cutting machine, and the sealing apparatus includes a channel at the position of a lower arm in the fluid tank for injecting a liquid, a sealing O-ring installed at the sealing apparatus for preventing a leak of liquid, such that a circulating channel is formed around the periphery of the lower arm. The liquid is injected through an injecting inlet into the circulating channel such that the centrifugal force produced by the whirling flow can wash away the debrises attached on the lower arm, and discharge the debrises from a discharge opening to the outside.Type: ApplicationFiled: November 20, 2007Publication date: May 21, 2009Inventor: Chen-Fu Tsai
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Patent number: 7119300Abstract: An apparatus of asynchronous electric discharge machine for wire cut adopted for use in machine industries employs a first electric discharge machine unit and a second electric discharge machine unit to provide electric energy to a cutting wire to generate alternate ignition and discharge on a work piece. The asynchronous operation uses two different discharge circuits in two different time sequences to reduce the probability of occurring discharge at the same spot and effectively reduce pause time, and prevent the cutting wire from rupturing, thereby to reduce production cost and improve operation efficiency.Type: GrantFiled: March 7, 2003Date of Patent: October 10, 2006Assignee: Industrial Technology Research InstituteInventors: Jui-Fang Liang, Chen-Fu Tsai, Chia-Pin Chen
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Publication number: 20040124182Abstract: An apparatus of asynchronous electric discharge machine for wire cut adopted for use in machine industries employs a first electric discharge machine unit and a second electric discharge machine unit to provide electric energy to a cutting wire to generate alternate ignition and discharge on a work piece. The asynchronous operation uses two different discharge circuits in two different time sequences to reduce the probability of occurring discharge at the same spot and effectively reduce pause time, and prevent the cutting wire from rupturing, thereby to reduce production cost and improve operation efficiency.Type: ApplicationFiled: March 7, 2003Publication date: July 1, 2004Inventors: Jui-Fang Liang, Chen-Fu Tsai, Chia-Pin Chen
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Patent number: 6612043Abstract: A method and an apparatus for vertically calibrating a wire of a wire cutting electric discharge machine are provided. The vertical calibration apparatus includes a body, an upper calibration board and a lower calibration board attached to the body and parallel to a machine table, with a circular hole formed through the upper calibration board and on the lower calibration board respectively. The two circular holes are coaxial and have different diameters. The method of wire vertical calibration includes searching for the circle centers of the two circular holes by contacting the circles several times with the wire in a prescribed manner, then passing the wire through the circle centers. The method and apparatus allow wire vertical calibration to be more easily and accurately performed.Type: GrantFiled: June 8, 2001Date of Patent: September 2, 2003Assignee: Industrial Technology Research InstituteInventors: Chen-Fu Tsai, Jui-Fang Liang
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Publication number: 20020184777Abstract: A method and an apparatus for vertically calibrating a wire of a wire cutting electric discharge machine are provided. The vertical calibration apparatus includes a body, an upper calibration board and a lower calibration board attached to the body and parallel to the machine table, with a ring hole formed on the upper calibration board and on the lower calibration board respectively. The two ring holes have the same vertical axis. The method of wire cutting electric discharge machine vertical calibration comprises searching for the circle centers of the two ring holes by constantly touching the ring edge several times by the wire, then passing the wire through the circle centers.Type: ApplicationFiled: June 8, 2001Publication date: December 12, 2002Applicant: Industrial Technology Research InstituteInventors: Chen-Fu Tsai, Jui-Fang Liang