Patents by Inventor Chen Ho-Hsiang

Chen Ho-Hsiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9006061
    Abstract: A method of forming a capacitor comprises forming a first electrode of the capacitor over a substrate. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures on the bottom conductive plane. The method also comprises forming an insulating structure over the first electrode. The method further comprises forming a second electrode of the capacitor over the insulating structure. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures under the top conductive plane. The first vertical conductive structures of the plurality of first vertical conductive structures and the second vertical conductive structures of the plurality of second vertical conductive structures are interlaced with each other.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: April 14, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chewn-Pu Jou, Chen Ho-Hsiang, Fred Kuo, Tse-Hul Lu
  • Publication number: 20140334063
    Abstract: A method of forming a capacitor comprises forming a first electrode of the capacitor over a substrate. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures on the bottom conductive plane. The method also comprises forming an insulating structure over the first electrode. The method further comprises forming a second electrode of the capacitor over the insulating structure. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures under the top conductive plane. The first vertical conductive structures of the plurality of first vertical conductive structures and the second vertical conductive structures of the plurality of second vertical conductive structures are interlaced with each other.
    Type: Application
    Filed: July 22, 2014
    Publication date: November 13, 2014
    Inventors: Chewn-Pu JOU, Chen HO-HSIANG, Fred KUO, Tse-Hul LU
  • Patent number: 8810002
    Abstract: A capacitor includes a first electrode. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures. The bottom conductive plane is disposed over a substrate. The capacitor includes a second electrode. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures. The capacitor includes an insulating structure between the first electrode and the second electrode. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other thereby providing higher capacitance density.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: August 19, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chewn-Pu Jou, Chen Ho-Hsiang, Fred Kuo, Tse-Hul Lu
  • Publication number: 20110108950
    Abstract: A capacitor includes a first electrode. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures. The bottom conductive plane is disposed over a substrate. The capacitor includes a second electrode. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures. The capacitor includes an insulating structure between the first electrode and the second electrode. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other thereby providing higher capacitance density.
    Type: Application
    Filed: June 29, 2010
    Publication date: May 12, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chewn-Pu JOU, Chen HO-HSIANG, Fred KUO, Tse-Hul LU
  • Patent number: 7821372
    Abstract: An electronic device includes a first winding having a first port and a second port. The first winding formed in a first metal layer. A second winding has a third port and a fourth port. The second winding includes a plurality of segments formed in the first metal layer. The second plurality of winding segments are connected by a bridge formed in a second metal layer. The first and second ports of the first winding are connected to the inner-portion of the first winding.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: October 26, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chen Ho-Hsiang
  • Publication number: 20100164667
    Abstract: An electronic device includes a first winding having a first port and a second port. The first winding formed in a first metal layer. A second winding has a third port and a fourth port. The second winding includes a plurality of segments formed in the first metal layer. The second plurality of winding segments are connected by a bridge formed in a second metal layer. The first and second ports of the first winding are connected to the inner-portion of the first winding.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chen HO-HSIANG