Abstract: An organic light emitting diode display is provided. The organic light emitting diode display comprises an organic light emitting diode panel, a quarter-wavelength retarder disposed on the organic light emitting diode panel, a polarizer disposed on the quarter-wavelength retarder, an adhesive layer disposed on the polarizer and a diffraction grating film adhered to the polarizer by the adhesive layer. The diffraction grating film comprises a substrate and a first diffraction grating layer comprising a plurality of first gratings aligned with a first direction disposed on the substrate.

Abstract: A semiconductor package includes multiple dies that share the same package pin. An output enable register provided on each die is used to select the die that drives an output to the shared pin. A hardware arbitration circuit ensures that two or more dies do not drive an output to the shared pin at the same time.

Abstract: A semiconductor package includes multiple dies that share the same package pin. An output enable register provided on each die is used to select the die that drives an output to the shared pin. A hardware arbitration circuit ensures that two or more dies do not drive an output to the shared pin at the same time.

Abstract: A semiconductor package includes multiple dies that share the same package pin. An output enable register provided on each die is used to select the die that drives an output to the shared pin. A hardware arbitration circuit ensures that two or more dies do not drive an output to the shared pin at the same time.

Abstract: Methods and systems consistent with this invention comprise a control circuit for reading data from a memory comprising a plurality of data channels. Such control circuits comprise at least one multiplexer, wherein the at least one multiplexer is configured to route a data strobe signal to a first number of the plurality of data channels for reading the data from the memory when the at least one multiplexer is in a first selected state, and wherein the at least one multiplexer is configured to route the data strobe signal to a second number of the plurality of data channels, wherein the second number is greater than the first number, for reading the data from the memory when the at least one multiplexer is in a second selected state. Such methods and systems may also comprise a clock for generating a data strobe signal, and a flip-flop for latching the data from the memory into the control circuit with the data strobe signal, wherein the data strobe signal does not leave the control circuit.

Abstract: Methods and systems consistent with this invention write data to a memory. Such methods and systems may generate a clock signal, generate an intermediate clock signal from the clock signal using a clock tree buffer, delay the intermediate clock signal to form a data strobe signal, and write the data to the memory using the data strobe signal and a memory clock signal. Such methods and systems may also delay the intermediate clock signal to form the memory clock signal.