Patents by Inventor Chen-Nan Hsiao
Chen-Nan Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11074148Abstract: A method for displaying a basic input-output system (BIOS) message during a power-on self-test (POST) of a computer system includes: after the computer system is connected to a power source, performing, by a baseboard management controller (BMC), an initialization procedure on a display unit so as to control the display unit; executing, by a processor, a BIOS stored in a memory component so as to generate the BIOS message; transmitting, by the processor, the BIOS message to the BMC; and transmitting, by the BMC, the BIOS message to the display unit.Type: GrantFiled: August 27, 2019Date of Patent: July 27, 2021Assignee: MITAC COMPUTING TECHNOLOGY CORPORATIONInventors: Chung-Huang Liu, Chen-Nan Hsiao
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Patent number: 11061689Abstract: A synchronization method, which is capable of data synchronization in both directions between a storage medium and a storage unit, includes steps of: determining whether first parameter data of the storage medium is identical to default parameter data stored in the storage medium; determining whether a value of a flag stored in the storage unit is equal to a first logical value; and performing data synchronization between the storage unit and the storage medium based on at least one of the two determinations.Type: GrantFiled: September 17, 2019Date of Patent: July 13, 2021Assignee: MITAC COMPUTING TECHNOLOGY CORPORATIONInventors: Po-Wen Huang, Chen-Nan Hsiao, Xu Zhang, Wei-Lung Shen
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Patent number: 10802918Abstract: A computer device, a server device, and a method for controlling a hybrid memory unit thereof are provided. The control method includes: executing, by a processing unit, an operating system (OS) in a working mode of the computer device; triggering, by a soft off control signal or a soft reset control signal when the processing unit executes the OS, the processing unit to enter an interrupt processing mode; executing, by the processing unit, basic input/output system (BIOS) program code in the interrupt processing mode; and controlling, by the processing unit by using the BIOS program code, to store data from a volatile memory into a non-volatile memory corresponding to the volatile memory.Type: GrantFiled: January 10, 2019Date of Patent: October 13, 2020Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION.Inventors: Wei-Lung Shen, Chen-Nan Hsiao, Chih-Cheng Wang, Chung-Huang Liu
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Patent number: 10691465Abstract: A method for synchronization of system management data includes steps of generating a request for system management data in response to execution of a system booting program, transmitting the request to a baseboard management controller so as to enable the baseboard management controller to transmit the system management data stored in a second storage unit to a processor; receiving the system management data from the baseboard management controller, and determining whether the system management data is complete; and when it is determined that the system management data is complete, storing at least one of the sequential packets of the system management data in a first storage unit, and proceeding with execution of the system booting program.Type: GrantFiled: November 15, 2018Date of Patent: June 23, 2020Assignee: Mitac Computing Technology CorporationInventors: Po-Wen Huang, Le Xing, Bichao Wang, Cheng-Chieh Yeh, Jie Zhang, Chen-Nan Hsiao
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Publication number: 20200097299Abstract: A synchronization method, which is capable of data synchronization in both directions between a storage medium and a storage unit, includes steps of: determining whether first parameter data of the storage medium is identical to default parameter data stored in the storage medium; determining whether a value of a flag stored in the storage unit is equal to a first logical value; and performing data synchronization between the storage unit and the storage medium based on at least one of the two determinations.Type: ApplicationFiled: September 17, 2019Publication date: March 26, 2020Inventors: Po-Wen HUANG, Chen-Nan HSIAO, Xu ZHANG, Wei-Lung SHEN
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Publication number: 20200073773Abstract: A method for displaying a basic input-output system (BIOS) message during a power-on self-test (POST) of a computer system includes: after the computer system is connected to a power source, performing, by a baseboard management controller (BMC), an initialization procedure on a display unit so as to control the display unit; executing, by a processor, a BIOS stored in a memory component so as to generate the BIOS message; transmitting, by the processor, the BIOS message to the BMC; and transmitting, by the BMC, the BIOS message to the display unit.Type: ApplicationFiled: August 27, 2019Publication date: March 5, 2020Applicant: MITAC COMPUTING TECHNOLOGY CORPORATIONInventors: Chung-Huang LIU, Chen-Nan HSIAO
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Publication number: 20190286527Abstract: A computer device, a server device, and a method for controlling a hybrid memory unit thereof are provided. The control method includes: executing, by a processing unit, an operating system (OS) in a working mode of the computer device; triggering, by a soft off control signal or a soft reset control signal when the processing unit executes the OS, the processing unit to enter an interrupt processing mode; executing, by the processing unit, basic input/output system (BIOS) program code in the interrupt processing mode; and controlling, by the processing unit by using the BIOS program code, to store data from a volatile memory into a non-volatile memory corresponding to the volatile memory.Type: ApplicationFiled: January 10, 2019Publication date: September 19, 2019Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION.Inventors: Wei-Lung SHEN, Chen-Nan HSIAO, Chih-Cheng WANG, Chung-Huang LIU
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Publication number: 20190146804Abstract: A method for synchronization of system management data includes steps of generating a request for system management data in response to execution of a system booting program, transmitting the request to a baseboard management controller so as to enable the baseboard management controller to transmit the system management data stored in a second storage unit to a processor; receiving the system management data from the baseboard management controller, and determining whether the system management data is complete; and when it is determined that the system management data is complete, storing at least one of the sequential packets of the system management data in a first storage unit, and proceeding with execution of the system booting program.Type: ApplicationFiled: November 15, 2018Publication date: May 16, 2019Inventors: Po-Wen HUANG, Le XING, Bichao WANG, Cheng-Chieh YEH, Jie ZHANG, Chen-Nan HSIAO
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Patent number: 10162646Abstract: A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.Type: GrantFiled: June 16, 2017Date of Patent: December 25, 2018Assignee: Mitac Computing Technology CorporationInventors: Po-Wen Huang, Kei-Way Chang, Shih-Ta Chu, Jun-Jie Wu, Chen-Nan Hsiao
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Publication number: 20170286123Abstract: A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.Type: ApplicationFiled: June 16, 2017Publication date: October 5, 2017Inventors: Po-Wen HUANG, Kei-Way CHANG, Shih-Ta CHU, Jun-Jie WU, Chen-Nan HSIAO
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Publication number: 20170220355Abstract: A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.Type: ApplicationFiled: February 2, 2016Publication date: August 3, 2017Inventors: Bo-Wen HUANG, Kei-Way CHANG, Shih-Ta CHU, Jun-Jie WU, Chen-Nan HSIAO
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Patent number: 9710284Abstract: A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.Type: GrantFiled: February 2, 2016Date of Patent: July 18, 2017Assignee: Mitac Computing Technology CorporationInventors: Bo-Wen Huang, Kei-Way Chang, Shih-Ta Chu, Jun-Jie Wu, Chen-Nan Hsiao
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Patent number: 8171762Abstract: An anti-theft device for a portable device is disclosed, wherein the portable device includes an aperture. The anti-theft device includes a coupler, an engaging/disengaging device, and a localizer. The localizer couples the engaging/disengaging device with an immovable object. The coupler includes a bridge portion and a leg, wherein the bridge portion and the leg are disposed on two different sides of the portable device. The engaging/disengaging device engages with the aperture of the portable device and also couples with the coupler to clamp the portable device.Type: GrantFiled: March 24, 2009Date of Patent: May 8, 2012Assignee: Sinox Co., LtdInventors: Chen-Nan Hsiao, Chun-Sheng Wu
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Publication number: 20090235699Abstract: The present invention relates to an anti-theft device for a portable device, wherein the portable device includes an aperture. The anti-theft device includes a coupler, an engaging/disengaging device, and a localizer. The localizer couples the engaging/disengaging device with an immovable object. The coupler includes a bridge portion and a leg, wherein the bridge portion and the leg are disposed on two different sides of the portable device. The engaging/disengaging device engages with the aperture of the portable device and also couples with the coupler to clamp the portable device.Type: ApplicationFiled: March 24, 2009Publication date: September 24, 2009Inventors: Chen-Nan Hsiao, Chun-Sheng Wu