Patents by Inventor Chen Tang

Chen Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194646
    Abstract: A semiconductor package includes a substrate, first bumps, a first chip, metal pillars, second bumps and a second chip. The substrate includes first and second conductive pads which are located on a top surface of the substrate. Both ends of the first bumps are connected to the first conductive pads and the first chip, respectively. Both ends of the metal pillars are connected to the second conductive pads and one end of the second bumps, respectively. A cross-sectional area of each of the metal pillars is larger than that of each of the second bumps. The second chip is connected to the other end of the second bumps and located above the first chip.
    Type: Application
    Filed: September 29, 2023
    Publication date: June 13, 2024
    Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chen-Yu Wang, Chih-Hao Chiang, Pai-Sheng Cheng, Kung-An Lin, Chun-Ting Kuo, Yu-Hui Hu, Wen-Cheng Hsu
  • Patent number: 12009811
    Abstract: A regeneration circuit includes a first inverting circuit, a second inverting circuit, a first transistor coupled to an input of the second inverting circuit, and a second transistor coupled to an input of the first inverting circuit. The regeneration circuit also includes a third transistor including a gate coupled to a gate of the first transistor, a first switch configured to couple the third transistor to the input of the second inverting circuit based on a voltage of the first inverting circuit, a fourth transistor including a gate coupled to a gate of the second transistor, and a second switch configured to couple the fourth transistor to the input of the first inverting circuit based on a voltage of the second inverting circuit.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: June 11, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventors: Chiu Keung Tang, Zhiqin Chen
  • Publication number: 20240184572
    Abstract: One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute an intermediate product of 16-bit operands and to compute a 32-bit sum based on the intermediate product.
    Type: Application
    Filed: December 4, 2023
    Publication date: June 6, 2024
    Applicant: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Publication number: 20240185916
    Abstract: The present disclosure relates to a sensing-memory-computing synergy device, chip and electronic device. The said device comprises: at least one sensing-memory-computing synergy cell, wherein each sensing-memory-computing synergy cell comprises K sensing elements, where the first end of each sensing element is connected to wordline, the second end of each sensing element is connected to bitline, the sensing element can sense changes in external inputs, and K is an integer greater than or equal to zero; a control module which controls the voltages of each wordline and bitline so that the sensing-memory-computing synergy cell can perform desired operations, and sense the voltage or current on bitlines to obtain the operation results. The present embodiment of the disclosure implements the sensing-memory-computing synergy cell by sensing elements, which combines sensing and in-memory computing.
    Type: Application
    Filed: November 28, 2023
    Publication date: June 6, 2024
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Wenjun Tang, Xueqing Li, Weihang Long, Jialong Liu, Yilun Zhong, Chen Jiang, Huazhong Yang
  • Patent number: 12000407
    Abstract: A ceiling fan blade assembly structure includes a blade holder, multiple fan blades, and multiple locking assemblies. Multiple fan blade assembly portions are disposed at an outer side of the blade holder. Each fan blade assembly portion includes two first side plates parallel to each other, a first radial positioning portion, and two first vertical positioning portions disposed on the two first side plates. Each fan blade has a fan blade connection portion that includes two second side plates, a second radial positioning portion, and two second vertical positioning portions. The second and the first radial positioning portions are engaged with each other, and the two second and first vertical positioning portions are engaged with each other. Accordingly, the fan blade connection portion is preliminarily positioned on the fan blade assembly portion. Through the locking assembly, the first and the second radial positioning portions are locked together.
    Type: Grant
    Filed: July 13, 2023
    Date of Patent: June 4, 2024
    Assignee: HOTECK INC.
    Inventors: Lung-Fa Hsieh, Yu-Chen Hsieh, Min-Yuan Hsiao, Wen-Ting Tang, Hsin-Chu Chang, Ying-Pin Chiang
  • Publication number: 20240170467
    Abstract: An electronic device includes a sustaining layer, multiple substrates, multiple photoelectric units, and multiple signal layers. The substrates are arranged on a contact surface of the sustaining layer. A first end edge of at least one substrate approaches a first end edge of the sustaining layer, and a first side edge of one substrate is adjacent to a second side edge of another substrate. The photoelectric units are arranged on the first or/and second surfaces of the substrates. The signal layers are arranged on the substrates and electrically connected to the photoelectric units.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Inventors: Chin-Tang LI, Ting-Yen LIN, Chen-Hsun YANG
  • Publication number: 20240170898
    Abstract: A bus bar assembly is provided and includes a first linking bus bar, a second linking bus bar and plural power connectors. The first linking bus bar includes a first main bar, a first bending part and a first conducting part. The first bending part connects between the first main bar and the first conducting part. The second linking bus bar is disposed corresponding to and isolated from the first linking bus bar, and includes a second main bar, a second bending part and a third conducting part. The second bending part connects between the second main bar and the third conducting part. The power connectors are electrically coupled with the first main bar and the second main bar, respectively.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Chen-Chiang Su, Ching-Tang Chang, Chi-Shou Ho, Guan-Chen Yin
  • Patent number: 11989937
    Abstract: A contextual filter system configured to perform operations that include, capturing an image frame at a client device, wherein the image frame includes a depiction of an object, identifying an object category of the object based on the depiction of the object within the image frame, accessing media content associated with the object category within a media repository, generating a presentation of the media content, and causing display of the presentation of the media content within the image frame at the client device.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: May 21, 2024
    Assignee: Snap Inc.
    Inventors: Ebony James Charlton, Celia Nicole Mourkogiannis, Travis Chen, Kevin Dechau Tang, Kaveh Anvaripour
  • Publication number: 20240162159
    Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang WANG, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
  • Publication number: 20240161403
    Abstract: Text-to-image generation generally refers to the process of generating an image from one or more text prompts input by a user. While artificial intelligence has been a valuable tool for text-to-image generation, current artificial intelligence-based solutions are more limited as it relates to text-to-3D content creation. For example, these solutions are oftentimes category-dependent, or synthesize 3D content at a low resolution. The present disclosure provides a process and architecture for high-resolution text-to-3D content creation.
    Type: Application
    Filed: August 9, 2023
    Publication date: May 16, 2024
    Inventors: Chen-Hsuan Lin, Tsung-Yi Lin, Ming-Yu Liu, Sanja Fidler, Karsten Kreis, Luming Tang, Xiaohui Zeng, Jun Gao, Xun Huang, Towaki Takikawa
  • Patent number: 11976267
    Abstract: The invention provides a recombinant Escherichia coli strain for producing succinic acid and a construction method thereof. The by-product encoding genes in the E. coli strain FMME-N-2 are knocked out to obtain the E. coli strain FMME-N-5 (?focA-pflB-?ldhA-?pta-ackA); and the phosphoenolpyruvate carboxykinase pck derived from Actinobacillus succinogenes and the phosphite dehydrogenase ptxD derived from Pseudomonas stutzeri were overexpressed. The constructed plasmid pTrcHisA-pck-ptxD was introduced into the expression host E. coli FMME-N-5 (?focA-pflB-?ldhA-?pta-ackA), and the cells were screened in a plate containing ampicillin, to obtain an engineered strain E. coli FMME-N-5 (?focA-pflB-?ldhA-?pta-ackA)-pck-ptxD that can efficiently produce succinic acid. After fermentation by a two-stage fermentation strategy, the production of succinic acid reaches 137 g/L, the yield of succinic acid is up to 1 g/g glucose, and the space time yield is 1.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 7, 2024
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Liming Liu, Wenxiu Tang, Chen Shen, Qiuling Luo, Xiulai Chen, Jia Liu, Cong Gao, Wei Song
  • Patent number: 11978115
    Abstract: A method for transferring a credit rights certificate is provided, including: generating a target account address according to a debtor account address and a creditor account address in a credit rights certificate transfer request, the target account address being a temporary account address used for storing a credit rights certificate and based on a multi-digital-signature process; transferring a credit rights certificate corresponding to the credit rights certificate transfer request from the debtor account address to the target account address; and transferring the credit rights certificate from the target account address to the creditor account address based on a confirmation instruction from the creditor account address.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: May 7, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Rui Guo, Yige Cai, Maocai Li, Qing Qin, Jianjun Zhang, Zongyou Wang, Zichao Tang, Qingzheng Shang, Chen Yang, Li Kong
  • Publication number: 20240142732
    Abstract: A method includes forming a first waveguide over a substrate; forming a first layer of low-dimensional material on the first waveguide; forming a first layer of dielectric material over the first layer of low-dimensional material; forming a second layer of low dimensional material on the first layer of dielectric material; and forming a first conductive contact that electrically contacts the first layer of low-dimensional material and a second conductive contact that electrically contacts the second layer of low-dimensional material.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Hsin Lu, Chin-Her Chien, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20240133745
    Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: Chein-Hsun WANG, Ming LE, Tung-Yang LEE, Yu-Chih LIANG, Wen-Chie HUANG, Chen-Tang HUANG, Jenping KU
  • Patent number: 11965833
    Abstract: A detection device includes a frame, a transport mechanism, detection mechanisms, and a grasping mechanism. The transport mechanism includes a feeding line, a first flow line, and a second flow line arranged in parallel on the frame. The detection mechanisms are arranged on the frame and located on two sides of the transport mechanism. The grasping mechanism is arranged on the frame and used to transport workpieces on the feeding line to the detection mechanisms, transport qualified workpieces to the first flow line, and transport unqualified workpieces to the second flow line.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: April 23, 2024
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jing-Zhi Hou, Lin-Hui Cheng, Yan-Chao Ma, Jin-Cai Zhou, Zi-Long Ma, Neng-Neng Zhang, Yi Chen, Chen-Xi Tang, Meng Lu, Peng Zhou, Ling-Hui Zhang, Lu-Hui Fan, Shi-Gang Xu, Cheng-Yi Chao, Liang-Yi Lu
  • Publication number: 20240129012
    Abstract: A wearable device includes a frame element and a dielectric substrate. The frame element includes a first metal element, a second metal element, and a third metal element. A first gap is provided between the first metal element and the second metal element. A second gap is provided between the second metal element and the third metal element. A third gap is provided between the third metal element and the first metal element. The dielectric substrate is surrounded by the first metal element, the second metal element, and the third metal element. A first antenna element is formed by the first metal element. A second antenna element is formed by the second metal element. A third antenna element is formed by the third metal element.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Inventors: Jing-Yao XU, Chung-Ting HUNG, Chun-Yuan WANG, Chu-Yu TANG, Yi-Chih LO, Yu-Chen ZHAO, Chih-Tsung TSENG
  • Publication number: 20240124470
    Abstract: A compound represented by general formula (I) or a stereoisomer, tautomer, deuterated substance, solvate, prodrug, metabolite, pharmaceutically acceptable salt or co-crystal thereof, an intermediate thereof and a preparation method therefor, as well as an application in preparation of a drug for treating diabetes.
    Type: Application
    Filed: December 24, 2021
    Publication date: April 18, 2024
    Inventors: Chen ZHANG, Ming LEI, Mingliang ZHAO, Yan YU, Pingming TANG, Guanglin WENG, Tao MOU, Yao LI, Jia NI, Pangke YAN
  • Publication number: 20240117451
    Abstract: Positive reference spiked in collected sample for use in qualitatively and quantitatively detecting viral RNA.
    Type: Application
    Filed: March 10, 2021
    Publication date: April 11, 2024
    Inventors: Shuwei YANG, Liancheng HUANG, Feifei FENG, Longwen SU, Kun LIN, Can TANG, Chen LIANG, Yuanmei WANG, Yanqing CAI, Yilin PANG, Chuan SHEN, Zhixue YU
  • Patent number: 11951814
    Abstract: The embodiments of the disclosure provide an intelligent glass and an intelligent window system, and relates to the technical field of window display. The intelligent glass of the disclosure includes a touch display assembly and a glass assembly. The touch display assembly is communicatively coupled to the glass assembly, and is configured to send a corresponding dimming instruction to the glass assembly based on a received touch instruction, such that the glass assembly adjusts its light transmittance based on the dimming instruction.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: April 9, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongbo Wang, Chen Meng, Zhong Hu, Yutao Tang, Wenjie Zhong, Dahai Hu, Wei Shi
  • Publication number: 20240112983
    Abstract: A semiconductor device includes a substrate, a semiconductor component and a heat dissipation component. The semiconductor component is disposed on the substrate. The heat dissipation component is disposed on the substrate and having a cavity, an inlet and an outlet, wherein the inlet and the outlet communicate with the cavity.
    Type: Application
    Filed: January 20, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li WANG, Chen-Hua YU, Chuei-Tang WANG, Shih-Chang KU