Patents by Inventor Chen-Wei Chang
Chen-Wei Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131538Abstract: An annular airflow regulating apparatus includes a cup-shaped element and an adjustment element. The cup-shaped element has a bowl and a bottom, integrated to form a first chamber. The bottom has a tapered channel parallel to an axis and penetrating through the bottom. A ring-shaped groove is disposed between the tapered channel and the bottom. The ring-shaped groove has an annular plane perpendicular to the axis. The adjustment element, having a tapered portion and second holes, is movably disposed in the cup-shaped element. The tapered portion protrudes into the tapered channel A tapered annular gap is formed between the tapered portion and the tapered channel. When the adjustment element is moved with respect to the cup-shaped element, a width of the tapered annular gap is varied, and thereupon a flow rate and velocity of the process gas would be varied accordingly.Type: ApplicationFiled: December 8, 2022Publication date: April 25, 2024Inventors: CHEN-CHUNG DU, Ming-Jyh Chang, Chang-Yi Chen, Ming-Hau Tsai, Ko-Chieh chao, Yi-Wei Lin
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Publication number: 20240136291Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.Type: ApplicationFiled: January 12, 2023Publication date: April 25, 2024Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
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Publication number: 20240128157Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.Type: ApplicationFiled: July 25, 2022Publication date: April 18, 2024Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240128987Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.Type: ApplicationFiled: November 28, 2022Publication date: April 18, 2024Applicant: PHISON ELECTRONICS CORP.Inventors: Shih-Jia Zeng, Yi-Fang Chang, Chun-Wei Tsao, Chen-An Hsu, Wei Lin
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Publication number: 20240124643Abstract: A method for producing a polyester polyol is provided, which includes: feeding a first antioxidant and a raw material reactant that includes a polyacid and a polyol into a reactor; subjecting the polyacid and the polyol to an esterification reaction to form an oligomer; and performing a prepolymerization reaction on the oligomer to obtain a prepolymerization reactant. During the prepolymerization reaction, the method includes sampling and monitoring an acid value of the prepolymerization reactant. When the acid value of the prepolymerization reactant reaches a first acid value, an esterification reaction catalyst is added to the prepolymerization reactant for carrying out a polycondensation reaction and generating a polycondensation reactant that contains the polyester polyol. During the polycondensation reaction, the method includes sampling and monitoring an acid value of the polycondensation reactant.Type: ApplicationFiled: November 30, 2022Publication date: April 18, 2024Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG
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Patent number: 11961919Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.Type: GrantFiled: March 21, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chung Chang, Hsiu-Hao Tsao, Ming-Jhe Sie, Shun-Hui Yang, Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen
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Patent number: 11962328Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.Type: GrantFiled: November 28, 2022Date of Patent: April 16, 2024Assignee: PHISON ELECTRONICS CORP.Inventors: Shih-Jia Zeng, Yi-Fang Chang, Chun-Wei Tsao, Chen-An Hsu, Wei Lin
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Patent number: 11948930Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.Type: GrantFiled: November 13, 2020Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240105629Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsuan Tsai, Chin-Chuan Chang, Szu-Wei Lu, Tsung-Fu Tsai
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Publication number: 20240099154Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.Type: ApplicationFiled: November 21, 2023Publication date: March 21, 2024Applicant: UNITED MICROELECTRONICS CORPInventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
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Patent number: 11929261Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The substrate is singulated to form dies. The first side of the dies are attached to a carrier. The dies are thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the dies. A device die is bonded to the second connectors. The dies and device dies are singulated into multiple packages.Type: GrantFiled: November 13, 2020Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Chuan Chang, Szu-Wei Lu, Chen-Hua Yu
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Patent number: 11929016Abstract: A scan-type display apparatus includes an LED array and a scan driver. The LED array has a common anode configuration, and includes multiple scan lines, multiple data lines and multiple LEDs. The scan driver includes multiple scan driving circuits. Each scan driving circuit includes a voltage generator and a detector. The voltage generator has an output terminal that is connected to the scan line corresponding to the scan driving circuit, and is configured to output one of an input voltage and a clamp voltage at the output terminal of the voltage generator. The detector is connected to the output terminal of the voltage generator, and generates a detection signal that indicates whether any one of the LEDs connected to the scan line corresponding to the scan driving circuit is short circuited based on a voltage at the output terminal of the voltage generator and a detection timing signal.Type: GrantFiled: December 5, 2022Date of Patent: March 12, 2024Assignee: MACROBLOCK, INC.Inventors: Chi-Min Hsieh, Che-Wei Chang, Chen-Yuan Kuo, Wei-Hsiang Cheng
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Patent number: 11929314Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.Type: GrantFiled: March 12, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11917923Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.Type: GrantFiled: April 28, 2021Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
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Patent number: 11773304Abstract: A polyurethane adhesive and a mixture used for manufacturing a plastic athletic track are provided. The polyurethane adhesive includes a urethane pre-polymer which is formed by a reaction between an isocyanate and a polyol. The polyol is selected from the group consisting of polyether polyol and polybutadiene polyol, and a number average molecular weight of the polyol is between 1,000 g/mole and 6,000 g/mole. Based on the total weight of the polyurethane adhesive, a content of the urethane pre-polymer is between 80 wt % and 99.5 wt %, and a viscosity of the polyurethane adhesive is between 1,000 cps and 3,000 cps under an environmental temperature of between 15° C. and 40° C.Type: GrantFiled: December 26, 2019Date of Patent: October 3, 2023Assignee: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Han-Ching Hsu, Chen-Wei Chang
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Patent number: 11732131Abstract: A thermoplastic polyurethane resin suitable for melt spinning is formed from a reaction mixture via a polymerization reaction. The reaction mixture includes an isocyanate component and a polyol component. The polyol component includes a first polyol that has a first number average molecular weight and a second polyol that has a second number average molecular weight. The first number average molecular weight is between 1,000 g/mol and 1,500 g/mol, and the second number average molecular weight is between 2,500 g/mol and 3,000 g/mol. One resin component formed by the first polyol via the polymerization reaction is defined as a low melting point segment and correspondingly has a first melting point between 170° C. and 185° C. Another resin component formed by the second polyol via the polymerization reaction is defined as a high melting point segment and correspondingly has a second melting point between 195° C. and 210° C.Type: GrantFiled: August 10, 2022Date of Patent: August 22, 2023Assignee: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Han-Ching Hsu, Chen-Wei Chang
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THERMOPLASTIC POLYURETHANE RESIN SUITABLE FOR A LAMINATING PROCESS AND METHOD FOR PRODUCING THE SAME
Publication number: 20230146238Abstract: A thermoplastic polyurethane resin suitable for a laminating process and a method for producing the same are provided. The thermoplastic polyurethane resin is formed of an isocyanate component, a polyol component, a chain extender component, and a chain terminator component that is a monohydric alcohol via a polymerization reaction. The polyol component includes a first polyol having a number average molecular weight between 600 and 2,000 g/mol and a second polyol having a number average molecular weight between 1,500 and 3,000 g/mol. The chain extender component includes a first chain extender and a second chain extender. The first chain extender is a dihydric alcohol having a carbon chain length of C2-6, and a molecular structure thereof is linear and symmetrical. The second chain extender is a dihydric alcohol having a carbon chain length of C3-10, and a molecular structure thereof has a side chain and/or an ether group.Type: ApplicationFiled: September 2, 2022Publication date: May 11, 2023Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG -
Publication number: 20230127766Abstract: A polyurethane hot melt adhesive is provided. The polyurethane hot melt adhesive is formed by reacting an isocyanate component, a polyol component, and a chain extender component. The polyol component includes a first polyol and a second polyol, a number-average molecular weight of the first polyol is within a range from 650 to 1,500, and a number-average molecular weight of the second polyol is within a range from 1,500 to 3,000. The chain extender component includes a first chain extender and a second chain extender, and the second chain extender is a diyol having an ether group or a hydrocarbyl. A ratio between a weight percentage of the first chain extender and a weight percentage of the second chain extender is within a range from 9:1 to 4:1. A forming temperature of the polyurethane hot melt adhesive is within a range from 100° C. to 150° C.Type: ApplicationFiled: July 26, 2022Publication date: April 27, 2023Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG
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Publication number: 20230121054Abstract: A thermoplastic polyurethane resin suitable for melt spinning is formed from a reaction mixture via a polymerization reaction. The reaction mixture includes an isocyanate component and a polyol component. The polyol component includes a first polyol that has a first number average molecular weight and a second polyol that has a second number average molecular weight. The first number average molecular weight is between 1,000 g/mol and 1,500 g/mol, and the second number average molecular weight is between 2,500 g/mol and 3,000 g/mol. One resin component formed by the first polyol via the polymerization reaction is defined as a low melting point segment and correspondingly has a first melting point between 170° C. and 185° C. Another resin component formed by the second polyol via the polymerization reaction is defined as a high melting point segment and correspondingly has a second melting point between 195° C. and 210° C.Type: ApplicationFiled: August 10, 2022Publication date: April 20, 2023Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG
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Publication number: 20210054250Abstract: A polyurethane adhesive and a mixture used for manufacturing a plastic athletic track are provided. The polyurethane adhesive includes a urethane pre-polymer which is formed by a reaction between an isocyanate and a polyol. The polyol is selected from the group consisting of polyether polyol and polybutadiene polyol, and a number average molecular weight of the polyol is between 1,000 g/mole and 6,000 g/mole. Based on the total weight of the polyurethane adhesive, a content of the urethane pre-polymer is between 80 wt % and 99.5 wt %, and a viscosity of the polyurethane adhesive is between 1,000 cps and 3,000 cps under an environmental temperature of between 15° C. and 40° C.Type: ApplicationFiled: December 26, 2019Publication date: February 25, 2021Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG