Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.

Abstract: A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.

Abstract: A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.

Abstract: A method for detecting glutathione includes mixing a sample including glutathione, 9-bromomethyl acridine (Br-MA) and a derivatization solvent to form a reaction solution. A derivative reaction occurs between Br-MA and glutathione to obtain a derivatization solution including a glutathione derivative with a thiol group being substituted with a tag. Excess Br-MA is removed by adding an interference removing solvent into the derivatization solution, followed by vortexing and centrifugation to obtain an aqueous layer solution. The aqueous layer solution is used as an analytic solution, and the glutathione derivative in the analytic solution is detected to obtain a glutathione value. The present invention also provides a kit for detecting glutathione which is adapted to carry out the method for detecting glutathione.

Abstract: A method for detecting glutathione includes mixing a sample including glutathione, 9-bromomethyl acridine (Br-MA) and a derivatization solvent to form a reaction solution. A derivative reaction occurs between Br-MA and glutathione to obtain a derivatization solution including a glutathione derivative with a thiol group being substituted with a tag. Excess Br-MA is removed by adding an interference removing solvent into the derivatization solution, followed by vortexing and centrifugation to obtain an aqueous layer solution. The aqueous layer solution is used as an analytic solution, and the glutathione derivative in the analytic solution is detected to obtain a glutathione value. The present invention also provides a kit for detecting glutathione which is adapted to carry out the method for detecting glutathione.