Patents by Inventor Chen Yung Ching

Chen Yung Ching has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Package on package devices and methods of packaging semiconductor dies
    Patent number: 9105552
    Abstract: Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a bump region and a tail region coupled to the bump region. The metal stud bumps are embedded in solder joints.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: August 11, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chien-Hsiun Lee, Chen Yung Ching
  • Package on Package Devices and Methods of Packaging Semiconductor Dies
    Publication number: 20130105979
    Abstract: Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a bump region and a tail region coupled to the bump region. The metal stud bumps are embedded in solder joints.
    Type: Application
    Filed: May 30, 2012
    Publication date: May 2, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Chien-Hsun Lee, Chen Yung Ching
  • Multi-project wafer and method of making same
    Patent number: 8409881
    Abstract: A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: April 2, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: William Cheng, Mirng-Ji Lii, Chen-Yung Ching, Hsin-Hui Lee
  • MULTI-PROJECT WAFER AND METHOD OF MAKING SAME
    Publication number: 20110049516
    Abstract: A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
    Type: Application
    Filed: November 8, 2010
    Publication date: March 3, 2011
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: William CHENG, Mirng-Ji Lii, Chen Yung Ching, Hsin-Hui Lee
  • Multi-project wafer and method of making same
    Patent number: 7851272
    Abstract: A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: December 14, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: William Cheng, Mirng-Ji Lii, Chen Yung Ching, Hsin-Hui Lee
  • MULTI-PROJECT WAFER AND METHOD OF MAKING SAME
    Publication number: 20080296571
    Abstract: A semiconductor wafer is fabricated. The wafer has a plurality of dies. The plurality of dies include at least operable dies of a first type and operable dies of a second type different from the first type. The dies of the second type are rendered inoperable, while keeping the dies of the first type operable. The wafer is provided with the operable dies of the first type and the inoperable dies of the second type on it, for testing of the dies of the first type.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 4, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: William Cheng, Mirng-Ji Lii, Chen Yung Ching, Hsin-Hui Lee