Patents by Inventor Chen-Zi Liao
Chen-Zi Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9159788Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n?2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.Type: GrantFiled: December 31, 2013Date of Patent: October 13, 2015Assignee: Industrial Technology Research InstituteInventors: Chih-Wei Hu, Chen-Zi Liao, Hsun-Chih Liu, Rong Xuan
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Patent number: 9112077Abstract: A semiconductor structure including a silicon substrate, a nucleation layer and a plurality of multi-layer sets is provided. The nucleation layer is disposed on the silicon substrate. The multi-layer sets are stacked over the nucleation layer, and each of the multi-layer sets includes a plurality of first sub-layers and a plurality of second sub-layers stacked alternately. A material of the first sub-layers and the second sub-layers includes Al-containing III-V group compound, wherein an average content of aluminum of the multi-layer sets decreases as a minimum distance between each of the multi-layer sets and the silicon substrate increases, and an aluminum content of the first sub-layers is different from an aluminum content of the second sub-layers.Type: GrantFiled: April 28, 2014Date of Patent: August 18, 2015Assignee: Industrial Technology Research InstituteInventors: Chen-Zi Liao, Chih-Wei Hu, Hsun-Chih Liu, Yen-Hsiang Fang, Rong Xuan
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Publication number: 20150187876Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer, in which the buffer layer includes n sub-buffer layers where n?2, and each of the sub-buffer layers has island structures. The nitride semiconductor layer is disposed on the buffer layer.Type: ApplicationFiled: December 31, 2013Publication date: July 2, 2015Applicant: Industrial Technology Research InstituteInventors: Chih-Wei Hu, Chen-Zi Liao, Hsun-Chih Liu, Rong Xuan
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Patent number: 8946775Abstract: A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0<tilted?0.5° with respect to a axis perpendicular to a (111) crystal plane, and the AlN layer is formed on the surface. The AlGaN layer is formed on the AlN layer. Moreover, an Al content in the AlGaN layer is decreased gradually in a layer thickness direction from the silicon substrate side toward the GaN layer side.Type: GrantFiled: August 22, 2012Date of Patent: February 3, 2015Assignee: Industrial Technology Research InstituteInventors: Chen-Zi Liao, Chih-Wei Hu, Yen-Hsiang Fang, Rong Xuan
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Patent number: 8779468Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.Type: GrantFiled: December 26, 2012Date of Patent: July 15, 2014Assignee: Industrial Technology Research InstituteInventors: Yen-Hsiang Fang, Chien-Pin Lu, Chen-Zi Liao, Rong Xuan, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
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Publication number: 20140124833Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.Type: ApplicationFiled: December 26, 2012Publication date: May 8, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yen-Hsiang Fang, Chien-Pin Lu, Chen-Zi Liao, Rong Xuan, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
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Publication number: 20140103354Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate includes a cubic silicon carbon nitride (SiCN) layer. The buffer layer is disposed on the nucleation layer. The nitride semiconductor layer is disposed on the buffer layer.Type: ApplicationFiled: October 9, 2013Publication date: April 17, 2014Applicant: Industrial Technology Research InstituteInventors: Chih-Wei Hu, Chen-Zi Liao, Yen-Hsiang Fang, Rong Xuan
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Publication number: 20140097444Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor layer is disposed on the buffer layer. The first type nitride semiconductor layer is doped with a first type dopant, at least one of the buffer layer and the first type nitride semiconductor layer comprises a codopant distributed therein, and an atomic radius of the codopant is larger than an atomic radius of the first type dopant. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer, the second type nitride semiconductor layer comprising a second type dopant.Type: ApplicationFiled: October 9, 2012Publication date: April 10, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
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Publication number: 20140097443Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor stacked layer, a light-emitting layer and a second type nitride semiconductor layer. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor stacked layer is disposed on the buffer layer. The first type nitride semiconductor stacked layer being a plurality of lattice mismatch stacked layers includes a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers. The first nitride semiconductor layers and the second nitride semiconductor layers are stacked alternately, and the first nitride semiconductor layers and the second nitride semiconductor layers are different material. The light-emitting layer is disposed on the first type nitride semiconductor stacked layer.Type: ApplicationFiled: October 9, 2012Publication date: April 10, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yen-Hsiang Fang, Rong Xuan, Chen-Zi Liao, Yi-Keng Fu, Chih-Wei Hu, Chien-Pin Lu, Hsun-Chih Liu
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Publication number: 20140097442Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The first buffer layer is disposed on the nucleation layer. The first buffer layer includes a dopant and Gallium, and an atomic radius of the dopant is larger than an atomic radius of Gallium. The first type nitride semiconductor layer is disposed over the first buffer layer. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer.Type: ApplicationFiled: October 9, 2012Publication date: April 10, 2014Applicant: Industrial Technology Research InstituteInventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
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Publication number: 20140054593Abstract: A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0<tilted?0.5° with respect to a axis perpendicular to a (111) crystal plane, and the AlN layer is formed on the surface. The AlGaN layer is formed on the AlN layer. Moreover, an Al content in the AlGaN layer is decreased gradually in a layer thickness direction from the silicon substrate side toward the GaN layer side.Type: ApplicationFiled: August 22, 2012Publication date: February 27, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chen-Zi Liao, Chih-Wei Hu, Yen-Hsiang Fang, Rong Xuan
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Patent number: 8482103Abstract: A nitride semiconductor template including a substrate, a mask layer, a first nitride semiconductor layer and a second nitride semiconductor is provided. The substrate has a plurality of trenches, each of the trenches has a bottom surface, a first inclined sidewall and a second inclined sidewall. The mask layer covers the second inclined sidewall and exposes the first inclined sidewall. The first nitride semiconductor layer is disposed over the substrate and the mask layer. The first nitride semiconductor layer fills the trenches and in contact with the first inclined sidewall. The first nitride semiconductor layer has voids located outside the trenches and parts of the mask layer are exposed by the voids. The first nitride semiconductor layer has a plurality of nano-rods. The second nitride semiconductor layer covers the nano-rods. The spaces between the nano-rods are not entirely filled by the second nitride semiconductor layer.Type: GrantFiled: December 9, 2010Date of Patent: July 9, 2013Assignee: Industrial Technology Research InstituteInventors: Hsun-Chih Liu, Chen-Zi Liao, Yen-Hsiang Fang, Rong Xuan, Chu-Li Chao
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Publication number: 20120146190Abstract: A nitride semiconductor template including a substrate, a mask layer, a first nitride semiconductor layer and a second nitride semiconductor is provided. The substrate has a plurality of trenches, each of the trenches has a bottom surface, a first inclined sidewall and a second inclined sidewall. The mask layer covers the second inclined sidewall and exposes the first inclined sidewall. The first nitride semiconductor layer is disposed over the substrate and the mask layer. The first nitride semiconductor layer fills the trenches and in contact with the first inclined sidewall. The first nitride semiconductor layer has voids located outside the trenches and parts of the mask layer are exposed by the voids. The first nitride semiconductor layer has a plurality of nano-rods. The second nitride semiconductor layer covers the nano-rods. The spaces between the nano-rods are not entirely filled by the second nitride semiconductor layer.Type: ApplicationFiled: December 9, 2010Publication date: June 14, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hsun-Chih Liu, Chen-Zi Liao, Yen-Hsiang Fang, Rong Xuan, Chu-Li Chao