Patents by Inventor Cheng-Chiao Wu

Cheng-Chiao Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070272846
    Abstract: An image chip package structure includes a carrier member, an image sensing die, a protective shield and a plurality of wires. The image sensing die has a side connected to the carrier and an opposite side with an image sensing region and a plurality of die bonding pads around the image sensing region. The protective shield has a connecting portion and a top shield portion. The connecting portion is connected to the image sensing die between the image sensing region and the die bonding pads to isolate the image sensing region and the die bonding pads and to surround the image sensing region. The top shield portion is connected to the connecting portion and above the image sensing region. The wires electrically connect the die bonding pads of the image sensing die and the carrier member.
    Type: Application
    Filed: August 8, 2007
    Publication date: November 29, 2007
    Applicant: Taiwan Electronic Packaging Co., Ltd.
    Inventor: Cheng-Chiao WU
  • Patent number: 6984896
    Abstract: An IC chip packaging comprises a carrier having a topside, a bottom side and a passage having an opening on the topside and another opening on the bottom side, a chip mounted on the topside of the carrier and covering the opening on the topside, a plurality of bonding wires each having one end electrically connected to said chip covered on the opening on the topside and an opposite end horizontally electrically connected to the bottom side of the carrier through the opening on the bottom side, and a protective member covering the opening on the bottom side and the opposite ends of the bonding wires. The protective member has a height vertically extended from a bottom side thereof to the carrier within 0.4 mm.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: January 10, 2006
    Inventor: Cheng-Chiao Wu
  • Publication number: 20050263865
    Abstract: An IC chip package includes a carrier having a top side, a bottom side, a receiving chamber, and a plurality of solder areas and non-solder areas alternately arranged around the opening of the receiving chamber, an IC chip fixedly mounted inside the receiving chamber, a plurality of solder wires respectively electrically connected between solder pads of the solder areas of the carrier and the IC chip, a cover for sealing the opening of the receiving chamber, a support means held between the non-solder areas of the carrier and the cover, and a bonding agent sealing gaps between the cover and the carrier for fixing the cover to the carrier.
    Type: Application
    Filed: August 13, 2004
    Publication date: December 1, 2005
    Inventor: Cheng-Chiao Wu
  • Patent number: 6635953
    Abstract: An IC chip package is constructed to comprise a substrate, a chip, adhesive means, and a cover. The substrate comprises a top side and a receiving chamber, the receiving chamber having an opening disposed in the top side. The top side of the substrate is provided with a plurality of connecting pads arranged around the opening of the receiving chamber. The chip is fixedly mounted in the receiving chamber and is provided with a plurality of connecting pads respectively electrically connected to the connecting pads of the substrate by means of bonding wires. The adhesive means is applied on the connecting area between the bonding wires and the connecting pads of the substrate. The cover is fixedly fastened to the adhesive means to close the opening of the receiving chamber.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: October 21, 2003
    Assignee: Taiwan Electronic Packaging Co., Ltd.
    Inventor: Cheng-Chiao Wu
  • Publication number: 20030081390
    Abstract: An IC chip packaging comprises a carrier having a topside, a bottom side and a passage having an opening on the topside and another opening on the bottom side, a chip mounted on the topside of the carrier and covering the opening on the topside, a plurality of bonding wires each having one end electrically connected to said chip covered on the opening on the topside and an opposite end horizontally electrically connected to the bottom side of the carrier through the opening on the bottom side, and a protective member covering the opening on the bottom side and the opposite ends of the bonding wires. The protective member has a height vertically extended from a bottom side thereof to the carrier within 0.4 mm.
    Type: Application
    Filed: September 3, 2002
    Publication date: May 1, 2003
    Inventor: Cheng-Chiao Wu
  • Publication number: 20020089039
    Abstract: An IC chip package is constructed to comprise a substrate, a chip, adhesive means, and a cover. The substrate comprises a top side and a receiving chamber, the receiving chamber having an opening disposed in the top side. The top side of the substrate is provided with a plurality of connecting pads arranged around the opening of the receiving chamber. The chip is fixedly mounted in the receiving chamber and is provided with a plurality of connecting pads respectively electrically connected to the connecting pads of the substrate by means of bonding wires. The adhesive means is applied on the connecting area between the bonding wires and the connecting pads of the substrate. The cover is fixedly fastened to the adhesive means to close the opening of the receiving chamber.
    Type: Application
    Filed: January 7, 2002
    Publication date: July 11, 2002
    Applicant: TAIWAN ELECTRONIC PACKAGING CO., LTD.
    Inventor: Cheng-Chiao Wu