Abstract: A ZIF connector and a semiconductor testing device using the ZIF connectors are provided. The ZIF connector comprises a body portion and a clamping portion. The body portion is a print circuit board provided with circuit patterns, and further comprises a plurality of signal holes disposed on an upper part of the body portion for electrically connecting a plurality of corresponding signal cables, and a plurality of electrical terminals disposed on a lower part of the body portion and arranged on two lateral sides of the body portion for electrically connecting a plurality of corresponding electrical pads of a substrate. The circuit patterns are provided in the body portion to connect to the electrical terminals through the signal holes accordingly. The clamping portion is horizontally extended on one lateral side of the body portion for securing the ZIF connector in a connector board.

Abstract: The present invention provides a method for continuity test of integrated circuit. By using both pins of integrated circuit to measure a current of an electrostatic discharge device, the contact resistance of the integrated circuit can be obtained by calculating. The method comprises the steps: First, a DUT (device under test) is provided, and the DUT includes a second pin and the second pin connecting zero reference potential. Then, a voltage is applied to a first pin of DUT. Finally, the current through said first pin and said second pin would be measured. Therefore, the testing result of the DUT could be more precise and the quality of the DUT would be made sure.

Abstract: A testing system module for testing printed circuit board (PCB) includes at least one robot having a pogo pin for moving to a testing point of the PCB; a pressure detecting unit for detecting a current pressure value on the printed circuit board; and a control system for keeping the pogo pin to contact with the PCB with constant pressure.

Abstract: The present invention provides a parallel test fixture for mixed signal integrated circuits (ICs). The fixture includes a multi-layer printed circuit board (PCB). The fixture includes: a test area, which is disposed on a central area of the multi-layer PCB and includes several test regions for a plurality of mixed signal ICs; an analog signal ground layer, which is operationally connected with the analog signals of the mixed signal ICs in the test area; and a digital signal ground layer, which is operationally connected with the digital signals of the mixed signal ICs in the test area. Thereby, when a plurality of mixed signal ICs are parallel tested, not only the problem due to cross-talk could be solved but also the numbers of the layers of the multi-layer PCB could be reduced effectively.

Abstract: A probe card is disclosed, which has a conductive layer additionally provided on an insulating seat of a probe stand and the conductive layer is electrically connected to a ground circuit on the probe card via a conductive pin being fed through the insulating seat. A conductive wire is wound surrounding the intermediate segment of the probe, one end of the conductive wire is electrically connected to the ground circuit of the circuit board, and the other end of the conductive wire is electrically connected to the conductive layer of the probe stand. Thus, due to that an additional ground portion of the conductive layer is provided on the conductive wire wound surrounding the probe, a loop inductance of the probe in the insulating seat can be reduced such that accuracy of test data of the probe can be enhanced.

Abstract: Discloses are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base disposed in a central portion of the main body and a plurality of test probes connected between the probe base and the main body. Each of the test probes has a tip extending from the probe base for contacting a wafer under test. The test probes include at least one power probe, at least one signal probe and a plurality of ground probes. Each of the test probes has a middle section interposed between the main body and the probe base. Each of the test probes except the ground probes has a naked middle section coated with an insulating film but not sheltered by an insulating sleeve.

Abstract: The present invention discloses a probe card for testing a wafer. The probe card comprises a printed circuit board for transmitting test signals, a fastened ring arranged at the downside of the printed circuit board, and a plurality of needles passing through the fastened ring, each needle having one end connecting to circuits of the printed circuit board, and having a tip portion at the other end connecting to a pad of the wafer, where each needle has at least one bent portion between the fastened ring and the tip portion, to absorb stress between the needle and the pad.

Abstract: A probe card is disclosed, which has a conductive layer additionally provided on an insulating seat of a probe stand and the conductive layer is electrically connected to a ground circuit on the probe card via a conductive pin being fed through the insulating seat. A conductive wire is wound surrounding the intermediate segment of the probe, one end of the conductive wire is electrically connected to the ground circuit of the circuit board, and the other end of the conductive wire is electrically connected to the conductive layer of the probe stand. Thus, due to that an additional ground portion of the conductive layer is provided on the conductive wire wound surrounding the probe, a loop inductance of the probe in the insulating seat can be reduced such that accuracy of test data of the probe can be enhanced.

Abstract: A ZIF connector, a semiconductor testing device using the ZIF connectors, and a semiconductor testing system using the ZIF connectors are proposed. The ZIF connector comprises a body portion and a clamping portion. The body portion is a print circuit board provided with circuit patterns, and further comprises a plurality of signal holes disposed on an upper part of the body portion for electrically connecting a plurality of corresponding signal cables and a plurality of electrical terminals disposed on a lower part of the body portion and arranged on two lateral sides of the body portion for electrically connecting a plurality of corresponding electrical pads of a substrate. The circuit patterns are provided in the body portion to connect to the electrical terminals through the signal holes accordingly. The clamping portion is horizontally extended on one lateral side of the body portion for securing the ZIF connector in a connector board.

Abstract: Discloses are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base disposed in a central portion of the main body and a plurality of test probes connected between the probe base and the main body. Each of the test probes has a tip extending from the probe base for contacting a wafer under test. The test probes include at least one power probe, at least one signal probe and a plurality of ground probes. Each of the test probes has a middle section interposed between the main body and the probe base. Each of the test probes except the ground probes has a naked middle section coated with an insulating film but not sheltered by an insulating sleeve.

Abstract: Disclosed is a probe card assembly including a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and the probe base. Each of the power probe and the signal probes further contains therein a core that is wrapped by an insulation layer.

Abstract: The present invention discloses a probe card for testing a wafer. The probe card comprises a printed circuit board for transmitting test signals, a fastened ring arranged at the downside of the printed circuit board, and a plurality of needles passing through the fastened ring, each needle having one end connecting to circuits of the printed circuit board, and having a tip portion at the other end connecting to a pad of the wafer, where each needle has at least one bent portion between the fastened ring and the tip portion, to absorb stress between the needle and the pad.

Abstract: Disclosed is a probe card assembly including a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and the probe base. Each of the power probe and the signal probes further contains therein a core that is wrapped by an insulation layer.

Abstract: Disclosed are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and contains therein a core that is wrapped by an insulation layer.

Abstract: Disclosed are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and contains therein a core that is wrapped by an insulation layer.

Abstract: The present invention provides a parallel test fixture for mixed signal integrated circuits (ICs). The fixture includes a multi-layer printed circuit board (PCB). The fixture comprises: a test area, which is disposed on a central area of the multi-layer PCB and includes several test regions for a plurality of mixed signal ICs; an analog signal ground layer, which is operationally connected with the analog signals of the mixed signal ICs in the test area; and a digital signal ground layer, which is operationally connected with the digital signals of the mixed signal ICs in the test area. Thereby, when a plurality of mixed signal ICs are parallel tested, not only the problem due to cross-talk could be solved but also the numbers of the layers of the multi-layer PCB could be reduced effectively.

Abstract: The present invention provides a method for continuity test of integrated circuit. By using both pins of integrated circuit to measure a current of an electrostatic discharge device, the contact resistance of the integrated circuit can be obtained by calculating. The method comprises the steps: First, a DUT (device under test) is provided, and the DUT includes a second pin and the second pin connecting zero reference potential. Then, a voltage is applied to a first pin of DUT. Finally, the current through said first pin and said second pin would be measured. Therefore, the testing result of the DUT could be more precise and the quality of the DUT would be made sure.

Abstract: A testing system module for testing printed circuit board (PCB) includes at least one robot having a pogo pin for moving to a testing point of the PCB; a pressure detecting unit for detecting a current pressure value on the printed circuit board; and a control system for keeping the pogo pin to contact with the PCB with constant pressure.

Abstract: A testing system module for testing printed circuit board (PCB) includes a first robot having a pogo pin for moving to a first testing point of a first surface of the PCB and the pogo pin contacting the first testing point; a second robot having another pogo pin for moving to a second point of a second surface of the PCB and the pogo pin contacting the second testing point; and a source meter for forcing the signals to the pogo pins and sensing the signals from the pogo pins.

Abstract: A method for measuring accurate stray capacitance of automatic test equipment (ATE) and system thereof are disclosed. The method has several steps, comprising: First of all, an internal circuit is charged and discharged several times by a driver unit; Next, the internal circuit is self-discharged, and values of voltage from V1 to V2; Then, interval of self-discharge is measured; further, the interval of self-discharge is substituted into mathematical expression of R-C discharge, and a first R-C equation is obtained; Moreover, a measuring-assistant module is connected with the ATE; Then, the steps mentioned above are repeated, and a second R-C equation is obtained; Final, stray resistance and capacitance could be solved by the two simultaneous equations. Therefore, using this method to measure stray capacitance of ATE is effective and inexpensive.