Patents by Inventor Cheng-Chung Chien
Cheng-Chung Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240157217Abstract: A golf teaching method and a golf teaching system are provided. The golf teaching method includes: configuring image capturing devices and golf simulator to capture swing images and corresponding simulator data records, when a user performs a golf swing; configuring an expert model that includes expert motion information and corresponding correction suggestion information; configuring a computing device to perform an analysis process on the swing images and the simulator data records to divide the golf swing into user motions according to stages and obtaining records of user motion information corresponding to the plurality of stages, and to compare the user motion information with the corresponding expert motion information in each stage through the expert model, and to provide the corresponding correction suggestion information according to a comparison result; and configuring a user interface to provide the correction suggestion information.Type: ApplicationFiled: April 20, 2023Publication date: May 16, 2024Inventors: CHENG-HUNG TSAI, CHIA-YU JIH, CHIH-CHUNG CHIEN, LI-LIN LU, SHAO-JUN TAN, WEN-FU LAI
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Patent number: 11597053Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.Type: GrantFiled: November 30, 2018Date of Patent: March 7, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
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Patent number: 10978329Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.Type: GrantFiled: November 7, 2019Date of Patent: April 13, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Publication number: 20200098613Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.Type: ApplicationFiled: November 7, 2019Publication date: March 26, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Patent number: 10510572Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.Type: GrantFiled: June 24, 2019Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Publication number: 20190311930Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.Type: ApplicationFiled: June 24, 2019Publication date: October 10, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Patent number: 10332769Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.Type: GrantFiled: January 15, 2016Date of Patent: June 25, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Publication number: 20190099856Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.Type: ApplicationFiled: November 30, 2018Publication date: April 4, 2019Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN
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Patent number: 10189143Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.Type: GrantFiled: May 18, 2016Date of Patent: January 29, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
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Publication number: 20170207109Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.Type: ApplicationFiled: January 15, 2016Publication date: July 20, 2017Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
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Publication number: 20170151648Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.Type: ApplicationFiled: May 18, 2016Publication date: June 1, 2017Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN
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Patent number: 7409258Abstract: Disclosed is a method and a system for measuring customer delivery service. A projected customer delivery date is generated. At least one projected output volume is determined based on the projected customer delivery date. At least one actual output volume is determined, and an accuracy of the projected customer delivery date is determined based on the at least one projected output volume and the at least one actual output volume.Type: GrantFiled: March 6, 2007Date of Patent: August 5, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Heng Huang, Kuo-Lien Chen, Chin-Hui Hung, Andy Hong, Cheng Meng, Cheng-Chung Chien
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Publication number: 20070255606Abstract: Disclosed is a method and a system for measuring customer delivery service. A projected customer delivery date is generated. At least one projected output volume is determined based on the projected customer delivery date. At least one actual output volume is determined, and an accuracy of the projected customer delivery date is determined based on the at least one projected output volume and the at least one actual output volume.Type: ApplicationFiled: March 6, 2007Publication date: November 1, 2007Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Heng Huang, Kuo-Lien Chen, Chin-Hui Hung, Andy Hong, Cheng Meng, Cheng-Chung Chien