Patents by Inventor Cheng-Fu Hsu
Cheng-Fu Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240148129Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.Type: ApplicationFiled: November 1, 2023Publication date: May 9, 2024Inventors: CHING-FU WANG, CHING-YU WANG, CHE-WEI HSU, JUI-CHEN LU, CHENG-CHE HO
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Patent number: 10995985Abstract: A drying apparatus includes a gas flow channel, a first hollow fiber module, a second hollow fiber module, a gas driver and a control unit. The gas flow channel is used to accommodate an article and has a first terminal and a second terminal. The first and second hollow fiber modules are disposed at the first and second terminals respectively to adsorb water or to be electrified to desorb water. The gas driver disposed in a gas flow path of the gas flow channel drives the gas flowing into the gas flow channel through the first hollow fiber module and flowing out from the gas flow channel through the second hollow fiber module, or flowing into the gas flow channel through the second hollow fiber module and flowing out from the gas flow channel through the first hollow fiber module. The control unit provides power to the first and second hollow fiber modules and controls the gas driver.Type: GrantFiled: April 14, 2016Date of Patent: May 4, 2021Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chin-Chih Tai, Yi-Shan Lee, Yun-Hsin Wang, Cheng-Fu Hsu
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Patent number: 10925162Abstract: A printed circuit board is provided. The printed circuit board includes N power layers and a first via group. The N power layers are arranged in parallel and spaced from each other. The first via group includes M rows of vias which are disposed through the N power layers, where N and M are positive integers greater than 0. Each row of the M rows of vias is electrically connected to the first layer of the N power layers. A Pth row of the M rows of vias is further electrically connected to Q power layers of the N power layers respectively, where Q is a smallest positive integer greater than or equal to P((N?1)/M), and P is a positive integer less than or equal to M.Type: GrantFiled: April 27, 2020Date of Patent: February 16, 2021Assignee: Wiwynn CorporationInventors: Cheng Fu Hsu, Cheng Wei Lin, Ting-Kai Wang
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Publication number: 20170167789Abstract: A drying apparatus includes a gas flow channel, a first hollow fiber module, a second hollow fiber module, a gas driver and a control unit. The gas flow channel is used to accommodate an article and has a first terminal and a second terminal. The first and second hollow fiber modules are disposed at the first and second terminals respectively to adsorb water or to be electrified to desorb water. The gas driver disposed in a gas flow path of the gas flow channel drives the gas flowing into the gas flow channel through the first hollow fiber module and flowing out from the gas flow channel through the second hollow fiber module, or flowing into the gas flow channel through the second hollow fiber module and flowing out from the gas flow channel through the first hollow fiber module. The control unit provides power to the first and second hollow fiber modules and controls the gas driver.Type: ApplicationFiled: April 14, 2016Publication date: June 15, 2017Inventors: Chin-Chih TAI, Yi-Shan LEE, Yun-Hsin WANG, Cheng-Fu HSU
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Patent number: 8907739Abstract: A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.Type: GrantFiled: July 13, 2011Date of Patent: December 9, 2014Assignee: Chung Yuan Christian UniversityInventors: Guang-Hwa Shiue, Che-Ming Hsu, Cheng-Fu Hsu
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Publication number: 20120032749Abstract: A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.Type: ApplicationFiled: July 13, 2011Publication date: February 9, 2012Applicant: CHUNG YUAN CHRISTIAN UNIVERSITYInventors: Guang-Hwa SHIUE, Che-Ming HSU, Cheng-Fu HSU
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Patent number: 7221039Abstract: A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.Type: GrantFiled: June 24, 2004Date of Patent: May 22, 2007Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kun-Ming Huang, Cheng-Fu Hsu
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Publication number: 20050285233Abstract: A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.Type: ApplicationFiled: June 24, 2004Publication date: December 29, 2005Inventors: Kun-Ming Huang, Cheng-Fu Hsu
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Publication number: 20050006701Abstract: A high voltage device comprising a substrate of a first type, a first and second well respectively of the first and a second type in the substrate, a gate formed on the substrate, a first and second doped region both of the second type, respectively formed in the first and second well and both sides of the gate, and a third doped region of the first type in the first well and adjacent to the first doped region.Type: ApplicationFiled: July 7, 2003Publication date: January 13, 2005Inventors: Tzu-Chiang Sung, Cheng-Fu Hsu
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Patent number: 6077776Abstract: A new method of removing impurities and moisture from the surface of a wafer and thereby preventing polysilicon residue is described. A dielectric layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the dielectric layer. A hard mask layer is deposited overlying the polysilicon layer and patterned to form a hard mask. The wafer is cleaned whereby moisture and impurities form on the surfaces of the hard mask and the polysilicon layer. Thereafter, the wafer is heat treated whereby the moisture and impurities are removed. Thereafter, the polysilicon layer is etched away where it is not covered by the hard mask to complete formation of a polysilicon line on a wafer in the fabrication of an integrated circuit.Type: GrantFiled: March 18, 1998Date of Patent: June 20, 2000Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Ching-Wen Cho, Cheng-Fu Hsu, Sen-Fu Chen, Po-Tao Chu