Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.

Abstract: The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends are respectively electrically connected with two of the bonding pads. A molding layer is packaged on the chip and the molding layer is higher than the predetermined height. The molding layer is sliced at the predetermined height. Two upper breakpoints of each metal wire are exposed and a substrate is attached onto the molding layer. A plurality of circuit contacts of the substrate are respectively electrically coupled with the upper breakpoints. Whereby, the invention is capable of reducing the length of the metal wires in order to improve transmission speed, but also to reduce the volume of the packaging structure.

Abstract: The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends are respectively electrically connected with two of the bonding pads. A molding layer is packaged on the chip and the molding layer is higher than the predetermined height. The molding layer is sliced at the predetermined height. Two upper breakpoints of each metal wire are exposed and a substrate is attached onto the molding layer. A plurality of circuit contacts of the substrate are respectively electrically coupled with the upper breakpoints. Whereby, the invention is capable of reducing the length of the metal wires in order to improve transmission speed, but also to reduce the volume of the packaging structure.

Abstract: The present invention relates to a package module for a memory IC chip, in which first solder pads provided on an upper surface of the memory IC chip is electrically connected to lower contact pads provided on the periphery of the ground pad, lower contact pads is soldered upward with lead frames and upper contact pads, and lastly a molding layer is used for packaging and enclosing the above elements, while only exposing the lower contact pads and the upper contact pads. Therefore, it will facilitate that each of upper contact pads of a lower layer is correspondingly soldered to one of lower contact pads of an upper layer as the upper layer and the lower layer are stacked together. Thus, it is capable of obtain high acceptable production yield, while accomplishing the object of expanding the memory capacity in total when stacking the layers of the package structure.

Abstract: The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends are respectively electrically connected with two of the bonding pads. A molding layer is packaged on the chip and the molding layer is higher than the predetermined height. The molding layer is sliced at the predetermined height. Two upper breakpoints of each metal wire are exposed and a substrate is attached onto the molding layer. A plurality of circuit contacts of the substrate are respectively electrically coupled with the upper breakpoints. Whereby, the invention is capable of reducing the length of the metal wires in order to improve transmission speed, but also to reduce the volume of the packaging structure.

Abstract: The present invention relates to a package module for a memory IC chip, in which first solder pads provided on an upper surface of the memory IC chip is electrically connected to lower contact pads provided on the periphery of the ground pad, lower contact pads is soldered upward with lead frames and upper contact pads, and lastly a molding layer is used for packaging and enclosing the above elements, while only exposing the lower contact pads and the upper contact pads. Therefore, it will facilitate that each of upper contact pads of a lower layer is correspondingly soldered to one of lower contact pads of an upper layer as the upper layer and the lower layer are stacked together. Thus, it is capable of obtain high acceptable production yield, while accomplishing the object of expanding the memory capacity in total when stacking the layers of the package structure.

Abstract: A side frame assembly for a wheelchair suspension includes a mainframe, and a front caster frame connected pivotally to both a front end of the mainframe and a front caster. A return spring is disposed between the front caster frame and the mainframe so as to bias the front caster to a predetermined position. A drive wheel assembly includes a drive wheel frame, a drive wheel disposed pivotally on the drive wheel frame, and a driving unit operable to rotate the drive wheel. A linkage is connected pivotally to the mainframe, the front caster frame and the drive wheel frame. A rear caster assembly includes a rear caster frame attached to a rear end of the mainframe, and a rear caster disposed pivotally on the rear caster frame.

Abstract: A side frame assembly for a wheelchair suspension includes a mainframe, and a front caster frame connected pivotally to both a front end of the mainframe and a front caster. A return spring is disposed between the front caster frame and the mainframe so as to bias the front caster to a predetermined position. A drive wheel assembly includes a drive wheel frame, a drive wheel disposed pivotally on the drive wheel frame, and a driving unit operable to rotate the drive wheel. A linkage is connected pivotally to the mainframe, the front caster frame and the drive wheel frame. A rear caster assembly includes a rear caster frame attached to a rear end of the mainframe, and a rear caster disposed pivotally on the rear caster frame.

Abstract: A method of packaging a QFN semiconductor uses a metal frame having multiple component carriers consisting of die pads and leads attached to a tape. Dies are respectively attached to and wire bonded to the component carriers. A glue wall is formed around all of the component carriers on the metal frame. When the transparent encapsulant is poured inside the glue wall, the dies and the component carriers are covered. After the tape is removed, the component carriers are cut out of the metal frame to complete the QFN semiconductors. Therefore, the method can increase the quantity and quality of QFN semiconductors produced without regard to the size of the individual QFN semiconductors.

Abstract: A lead semiconductor package includes a leadframe, a chip and an encapsulant. The leadframe has a central opening and multiple flat leads. The multiple flat leads define edges of the central opening. Each lead has an exposed portion and an inner thin portion. The inner thin portion is close to the central opening. The chip is mounted on the leads and is wire bonded to the inner thin portion. The inner thin portion is thicker than the exposed thick portion to provide a wire bonding space. Therefore, the semiconductor package is very thin. Further, the encapsulant covers the leadframe except portions of the leads and a portion of the chip to increase heat radiation.

Abstract: An ultra thin semiconductor device has a lead frame for holding a chip and an encapsulant sealing the chip and the lead frame. The lead frame has a die pad and multiple leads for wire bonding with the chip. A die recess to hold the chip is defined in the die pad. A depth of the die recess decreases a total height of the chip and the die pad to provide the wires enough bonding space. That is, the semiconductor device easily has a 0.4 mm thickness to be an ultra thin semiconductor product.

Abstract: A semiconductor packaging structure mainly has a lead frame with a die pad and a plurality of leads, a wall portion formed by molding compound positioned around a periphery of the lead frame, a chip mounted on the die pad and electrically connected with the plurality of lead via gold wires, and a cover mounted on the wall portion to enclose the chip. An interval is defined between the die pad and the plurality of leads for filling with an isolating resin, the interval further communicates with multiple gaps and each gap is defined between two adjacent of the plurality of leads, wherein each gap is also filled with the isolating resin.

Abstract: A semiconductor packaging structure mainly has a lead frame with a die pad and a plurality of leads, a wall portion formed by molding compound positioned around a periphery of the lead frame, a chip mounted on the die pad and electrically connected with the plurality of lead via gold wires, and a cover mounted on the wall portion to enclose the chip. An interval is defined between the die pad and the plurality of leads for filling with an isolating resin, the interval further communicates with multiple gaps and each gap is defined between two adjacent of the plurality of leads, wherein each gap is also filled with the isolating resin.