Abstract: A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.

Abstract: Gate driver circuitry that controls an array of display elements is described. The gate driver circuitry has gate drivers that apply a control pulse to each of a number of gate lines in sequence, from a previous gate line to a current gate line, during a frame interval in which the array of display elements is filled with pixel values. Each gate driver has a latch stage followed by an output stage. The output stage is coupled to drive a current gate line, and the latch stage is coupled to drive a) a first hold circuit that holds the current gate line at a predetermined voltage, and b) a second hold circuit that holds a previous gate line at a predetermined voltage. Other embodiments are also described and claimed.

Abstract: A display may be provided with integral touch functionality. The display may include a common electrode layer having row electrodes arranged in rows and column electrodes interposed between the row electrodes of each row. The row electrodes may be electrically coupled by conductive paths. The row and column electrodes may be coupled to touch sensor circuitry that uses the row and column electrodes to detect touch events. Each electrode of the common electrode layer may cover a respective portion of an array of pixels. Each pixel of the display may have a respective aperture. The conductive paths that electrically couple row electrodes of the common electrode layer may cover or otherwise block some light from passing through pixels, resulting in reduced apertures. Dummy structures may be provided for other pixels that modify the apertures of the other pixels to match the reduced apertures associated with the conductive paths.

Abstract: Reduction of the effects of differences in parasitic capacitances in touch screens is provided. A touch screen can include multiple display pixels with stackups that each include a first element and a second element. For example, the first element can be a common electrode, and the second element can be a data line. The display pixels can include a first display pixel including a third element connected to the first element, and the third element can contribute to a first parasitic capacitance between the first and second elements of the first display pixel, for example, by overlapping with the second element. The touch screen can also include a second display pixel lacking the third element. The second display pixel can include a second parasitic capacitance between the first and second elements of the second display pixel. The first and second parasitic capacitances can be substantially equal, for example.

Abstract: Setting a slew rate, e.g., a rising time or a falling time, of a scanning signal can be performed with a first operation, and a shunting resistance of the scanning line can be set with a second operation. A scanning system that scans a display screen, a touch screen, etc., can set a desired slew rate during a first period of time and can set a desired shunting resistance during a second period of time. A gate line system can sequentially scan gate lines to display an image during a display phase of a touch screen. The gate line system can, for example, increase the falling times of gate line signals. After the falling gate line signal has stabilized, for example, the gate line system can decrease the shunting resistance of the gate line.

Abstract: An electronic display system has a light transmissive panel, a region of display elements on the panel, and source lines coupled to the display elements. A demultiplexer circuit has multiple groups of pass gates. Each pass gate has a pair of complimentary on-panel transistors, and the signal outputs of each group are connected to a respective group of the source lines. A display driver integrated circuit (IC) receives video data and timing control signals. A signal input of each group of pass gates is connected to a respective output pin of the driver IC. The display driver IC provides digital timing control signals to control the pass gates of the demultiplexer circuit. Other embodiments are also described.

Abstract: Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel.

Abstract: Common electrodes (Vcom) of integrated touch screens can be segmented into electrically isolated Vcom portions that can be operated as drive lines and/or sense lines of a touch sensing system. The touch screen can include high-resistivity connections between Vcom portions. The resistivity of the high-resistivity connections can be high enough so that touch sensing and image display can be performed by the touch screen, and the high-resistivity connections can provide an added functionality by allowing a charge build up on one of the Vcom portions to be spread to other Vcom portions and/or discharged from system by allowing charge to leak through the high-resistivity connections. In this way, for example, visual artifacts that result from charge build up on a Vcom portion can be reduced or eliminated.

Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

Abstract: Devices and methods for reducing or eliminating image artifacts are provided. By way of example, a display panel includes row common voltage (VCOM) electrodes each having a first width. The row VCOM electrodes extend along a first direction of the display panel. The display panel also includes column VCOM electrodes each having a second width. The column VCOM electrodes extend along a second direction of the display panel perpendicular to the first direction. The second width of the column VCOM electrodes may be substantially less than the first width of the row VCOM electrodes to increase a resistance of the column VCOM electrodes. By increasing the resistance of the column VCOM electrodes, image artifacts on the display panel may be prevented or eliminated.

Abstract: Methods and devices for shielding displays from electrostatic discharge (ESD) are provided. In one example, a display of an electronic device may include a high resistivity shielding layer configured to protect electrical components from static charges. The display may also include a conductive layer electrically coupled to the high resistivity shielding layer and configured to decrease a discharge time of static charges from the high resistivity shielding layer. The display may include a grounding layer and a conductor electrically coupled between the conductive layer and the grounding layer to direct static charges from the conductive layer to the grounding layer.

Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

Abstract: Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel.

Abstract: A display may be provided with integral touch functionality. The display may include a common electrode layer having row electrodes arranged in rows and column electrodes interposed between the row electrodes of each row. The row electrodes may be electrically coupled by conductive paths. The row and column electrodes may be coupled to touch sensor circuitry that uses the row and column electrodes to detect touch events. Each electrode of the common electrode layer may cover a respective portion of an array of pixels. Each pixel of the display may have a respective aperture. The conductive paths that electrically couple row electrodes of the common electrode layer may cover or otherwise block some light from passing through pixels, resulting in reduced apertures. Dummy structures may be provided for other pixels that modify the apertures of the other pixels to match the reduced apertures associated with the conductive paths.

Abstract: A touch sensitive device that can detect the amount of pressure being applied to a touch screen from a user or other external object is provided. A spacer of the touch screen can be coated with a layer of conductive material and the change in capacitance between the spacer and various circuit elements of the touch screen can be measured. The change in capacitance can be correlated to the amount of pressure being applied to the touch screen, thus providing a method to determine the pressure being applied. During operation of the device, the system can time multiplex touch, display and pressure sensing operations so as to take advantage of an integrated touch and display architecture.

Abstract: An electronic display system has a light transmissive panel, a region of display elements on the panel, and source lines coupled to the display elements. A demultiplexor circuit has multiple groups of pass gates. Each pass gate has a pair of complimentary on-panel transistors, and the signal outputs of each group are connected to a respective group of the source lines. A display driver integrated circuit (IC) receives video data and timing control signals. A signal input of each group of pass gates is connected to a respective output pin of the driver IC. The display driver IC provides digital timing control signals to control the pass gates of the demultiplexor circuit. Other embodiments are also described.