Abstract: A lighting emitting diode (LED) device includes a first adjust module and a second adjust module. The first adjust module includes at least one first LED and has a first internal impedance having a first characteristic curve. A range covered by the first characteristic curve includes a first incomplete conduction region and a first conduction region. As the current increases from zero value and up, the first internal impedance decreases exponentially in the first incomplete conduction region, is approximately linear in the first conduction region. The second adjust module includes an impedance-providing component and an electronic component coupled in series. The second adjust module is coupled in parallel with the first adjust module. The second adjust module has a second internal impedance having a second characteristic curve. The first characteristic curve and the second characteristic curve match one another.

Abstract: A communication receiver and a receiving method are disclosed. An analog front-end device samples a receiving signal and generates a sampled signal. A signal detector detects presence of the receiving signal according to the sampled signal. A symbol timing recovery (STR) unit determines an optimal symbol sampling point according to a zero-crossing point of the sampled signal when the receiving signal is present, and then generates a recovered symbol based on an optimally chosen sampled value according to the optimal symbol sampling point.

Abstract: A method and system of receiving data with enhanced partial matching is disclosed. A received word is compared with the frame code to determine mismatch bit(s). Subsequently, a determination is made whether the mismatch bit(s) are at positions of defined critical bits. If the mismatch bit(s) are not critical, the received word is then affirmed.

Abstract: A communication receiver and a receiving method are disclosed. An analog front-end device samples a receiving signal and generates a sampled signal. A signal detector detects presence of the receiving signal according to the sampled signal. A symbol timing recovery (STR) unit determines an optimal symbol sampling point according to a zero-crossing point of the sampled signal when the receiving signal is present, and then generates a recovered symbol based on an optimally chosen sampled value according to the optimal symbol sampling point.

Abstract: A vertical blanking interval (VBI) data processing method includes: receiving at least one output signal currently outputted from at least one scan line, and utilizing a processing circuit to check a quality of the at least one output signal currently outputted from the at least one scan line according to at least one specific standard; determining an examination result according to whether the at least one output signal outputted currently from the at least one scan line complies with the at least one specific standard; and adjusting configuration of the at least one scan line according to the examination result.

Abstract: A method and system of receiving data with enhanced partial matching is disclosed. A received word is compared with the frame code to determine mismatch bit(s). Subsequently, a determination is made whether the mismatch bit(s) are at positions of defined critical bits. If the mismatch bit(s) are not critical, the received word is then affirmed.

Abstract: An N-order finite impulse response (FIR) filter with a symmetric coefficient set is provided. An input device receives a serial of input signals according to a sampling frequency and stores the received data into the first and second memories by turns. A first calculating device reads the N successively received data from the first and second memories according to an operation frequency and generates a plurality of first calculation values, wherein each of the read data corresponds to a coefficient of the symmetric coefficient set and the first calculation value is generated by summing the read data corresponding to the same coefficient. A second calculating device generates a plurality of second calculation values, wherein the second calculation value is generated by multiplying the first calculation value and the corresponding coefficient. A third calculating device accumulates the second calculation values to generate an output signal.