Patents by Inventor Cheng-Hsun Ho

Cheng-Hsun Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11999944
    Abstract: A method for promoting growth of a probiotic microorganism includes cultivating the probiotic microorganism in a growth medium containing a fermented culture of lactic acid bacterial strains that include Lactobacillus salivarius subsp. salicinius AP-32 deposited at the China Center for Type Culture Collection (CCTCC) under CCTCC M 2011127, Lactobacillus plantarum LPL28 deposited at the China General Microbiological Culture Collection Center (CGMCC) under CGMCC 17954, Lactobacillus acidophilus TYCA06 deposited at the CGMCC under CGMCC 15210, and Bifidobacterium longum subsp. infantis BLI-02 deposited at the CGMCC under CGMCC 15212.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: June 4, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Cheng-Chi Lin, Chen-Hung Hsu, Tsai-Hsuan Yi, Yu-Wen Chu, Yi-Wei Kuo, Jui-Fen Chen, Shin-Yu Tsai
  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Patent number: 11969447
    Abstract: A composition for promoting defecation includes a cell culture of at least one lactic acid bacterial strain which is substantially free of cells. The least one lactic acid bacterial strain is selected from the group consisting of Lactobacillus salivarius subsp. salicinius AP-32, Bifidobacterium animalis subsp. lactis CP-9, and Lactobacillus acidophilus TYCA06, which are respectively deposited at the Bioresource Collection and Research Center (BCRC) under accession numbers BCRC 910437, BCRC 910645 and BCRC 910813. Also disclosed is a method for promoting defecation, including administering to a subject in need thereof an effective amount of the composition.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 30, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yi-Wei Kuo, Yu-Fen Huang, Cheng-Chi Lin
  • Publication number: 20150125893
    Abstract: The invention provides fusion proteins comprising at least one fluorescent protein that is linked to at least one transporter protein that changes three-dimensional conformation upon specifically transporting its substrate. The transporter protein may be a nitrate transporter, a peptide transporter, or a hormone transporter. The invention provides fusion proteins comprising at least one fluorescent protein that is linked to at least one mechanosensitive ion channel protein. The invention also provides for methods of using the fusion proteins of the present invention and nucleic acids encoding the fusion proteins.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 7, 2015
    Inventors: Wolf B. Frommer, Cheng-Hsun Ho
  • Patent number: 7559045
    Abstract: A database-aided circuit design system and method therefor is provided, which can be utilized to detect problems of the product in an early design stage through the early design stage error-detection function, by making use of an artificial intelligence simulation database, storing the determination criterions for the optimized circuits, searching for failure generating factors and correcting the errors relative to the problems generated, based on the post production stage error-diagnosis function, in cooperation with the records stored in the artificial intelligence simulation database after the product has been actually produced, thus achieving the reduction of the product design and development costs, shortening the product market delivery time, and raising the competitiveness of the product.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: July 7, 2009
    Assignee: Inventec Corporation
    Inventors: Che-Ming Chen, Po-Cheng Chiu, Chin-Tien Tseng, Ying-Chun Chen, Cheng-Hsun Ho
  • Publication number: 20080198029
    Abstract: A method for searching a position of an electronic component is provided. A coordinate value is computed based on the position of the electronic component during the placement process of the electronic component in a circuit diagram. Then, the computed coordinate value is combined with a symbol of the electronic component to produce a position serial number. The position serial number is stored in a database. Therefor, if the layout software receives a search command, the position serial number corresponding to the search command is searched out from the database, and a coordinate block matched to the position serial number is circled. Therefore, the convenience for using the circuit diagram is promoted.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Applicant: INVENTEC CORPORATION
    Inventor: Cheng-Hsun Ho
  • Publication number: 20080155483
    Abstract: A database-aided circuit design system and method therefor is provided, which can be utilized to detect problems of the product in an early design stage through the early design stage error-detection function, by making use of an artificial intelligence simulation database, storing the determination criterions for the optimized circuits, searching for failure generating factors and correcting the errors relative to the problems generated, based on the post production stage error-diagnosis function, in cooperation with the records stored in the artificial intelligence simulation database after the product has been actually produced, thus achieving the reduction of the product design and development costs, shortening the product market delivery time, and raising the competitiveness of the product.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: INVENTEC CORPORATION
    Inventors: Che-Ming Chen, Po-Cheng Chiu, Chin-Tien Tseng, Ying-Chun Chen, Cheng-Hsun Ho
  • Publication number: 20080127022
    Abstract: A method for managing net data of a layout is provided. The method comprises first establishing a net data classification index list in which a net name corresponds to a sub group; comparing a newly added net name with the net data classification index list; classifying the newly added net name to a designated sub group when the newly added net name does not exist in the net data classification index list; establishing an association between the newly added net name and the sub group; and storing the association corresponding to the net name and the sub group in the net data classification index list. Thus the efficiency for managing and utilizing the net data is improved.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 29, 2008
    Inventors: Yu-Chuan Chang, Yi-Hsin Hsieh, Yung-Chien Cheng, Chin-Tien Tseng, Cheng-Hsun Ho
  • Publication number: 20070214432
    Abstract: A method for quick naming graphics with the same properties comprises the following steps: selecting a plurality of graphics with the same properties from an operation window, then defining an object name and adding auxiliary symbols behind the object name by using the increment rule to generate a plurality of object names containing the sequentially corresponding auxiliary symbols; and marking the object names containing the respective auxiliary symbols on the respective graphics sequentially and correspondingly. Users may repeat the above steps to continuously select another object name, thereby achieving the quick naming of the graphics.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 13, 2007
    Inventors: Cheng-Hsun Ho, Yu-Chuan Chang, Yi-Hsin Hsieh, Yung-Chien Cheng, Chin-Tien Tseng