Patents by Inventor Cheng Hua
Cheng Hua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240186275Abstract: Semiconductor devices including the use of solder materials and methods of manufacturing are provided. In embodiments the solder materials utilize a first tensile raising material, a second tensile raising material, and a eutectic modifier material. By utilizing the materials a solder material can be formed and used with a reduced presence of needles that may otherwise form during the placement and use of the solder material.Type: ApplicationFiled: January 9, 2023Publication date: June 6, 2024Inventors: Chao-Wei Chiu, Jen-Jui Yu, Hsuan-Ting Kuo, Cheng-Shiuan Wong, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 12002799Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.Type: GrantFiled: July 25, 2022Date of Patent: June 4, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen-Hua Yu, Hung-Yi Kuo, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Yuan Yu, Ming Hung Tseng
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Publication number: 20240177893Abstract: An over-current protection device includes a heat-sensitive layer and an electrode layer. The electrode layer includes a top metal layer and a bottom metal layer, and the heat-sensitive layer attached therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a conductive filler. The polymer matrix includes a polyolefin-based homopolymer and a polyolefin-based copolymer. The polyolefin-based homopolymer has a first coefficient of thermal expansion (CTE), and the polyolefin-based copolymer has a second CTE lower than the first CTE. The polyolefin-based homopolymer and the polyolefin-based copolymer together form an interpenetrating polymer network (IPN).Type: ApplicationFiled: May 3, 2023Publication date: May 30, 2024Inventors: CHENG-YU TUNG, Chia-Yuan Lee, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU, Takashi Hasunuma
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Publication number: 20240173438Abstract: Disclosed herein are second near-infrared (NIR-II) fluorescent composite and its production method. The method mainly includes the steps of, mixing a gold nanocluster having a plurality of a thiol-based compound on its outer surface and alpha-glycerylphosphorylcholine (alpha-GPC) in a solvent to form a mixture; replacing the solvent with an inert gas; and heating the mixture at a temperature about 100-200° C. in the presence of the inert gas until at least a portion of the gold nanocluster is encapsulated by a capping layer consisting of alpha-GPC, thereby producing the NIR-II fluorescent composite. The thus-produced NIR-II fluorescent composite is characterized by having an emission wavelength covering NIR-II region detectable by specialized camera. Also encompassed in the present disclosure is a method for conducting in vivo bioimaging of a target area in a subject.Type: ApplicationFiled: November 30, 2022Publication date: May 30, 2024Applicant: Chung Yuan Christian UniversityInventors: Cheng-An LIN, Yi-Tang SUN, Min-Hua CHEN
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Patent number: 11997066Abstract: A data transmission system and method thereof for edge computing are provided. A terminal mobile station international subscriber directory number (MSISDN) and a terminal IP of a target terminal are obtained with a domain name system (DNS) by a device providing communication services from the data transmission system. After data packets are sent to the data transmission system, if the target terminal is in an idle mode, a paging message is sent by a terminal wake-up module to enable the target terminal to return to a connected mode for communication. Before a connection is established between the data transmission system and the target terminal, downlink data packets can be temporarily stored, and the packets can be sent after the target terminal is in the connected mode. A computer readable medium for executing the data transmission method is also provided.Type: GrantFiled: January 9, 2023Date of Patent: May 28, 2024Assignee: CHUNGHWA TELECOM CO., LTD.Inventors: Yi-Hua Wu, Wei-Shan Lu, Kang-Hao Lo, Cheng-Yi Chien, Yueh-Feng Li, Ling-Chih Kao
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Patent number: 11996400Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.Type: GrantFiled: April 27, 2022Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
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Patent number: 11993066Abstract: A lamination chuck for lamination of film materials includes a support layer and a top layer. The top layer is disposed on the support layer. The top layer includes a polymeric material having a Shore A hardness lower than a Shore hardness of a material of the support layer. The top layer and the support layer have at least one vacuum channel formed therethrough, vertically extending from a top surface of the top layer to a bottom surface of the support layer.Type: GrantFiled: August 5, 2021Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Jie Huang, Yu-Ching Lo, Ching-Pin Yuan, Wen-Chih Lin, Cheng-Yu Kuo, Yi-Yang Lei, Ching-Hua Hsieh
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Patent number: 11996466Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.Type: GrantFiled: May 9, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
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Patent number: 11990510Abstract: A semiconductor device, includes a channel region, and a source/drain region adjacent to the channel region. The source/drain region includes a first epitaxial layer, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer, and the first epitaxial layer is made of SiAs.Type: GrantFiled: July 26, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Yi Peng, Ting Tsai, Chung-Wei Hung, Jung-Ting Chen, Ying-Hua Lai, Song-Bor Lee, Bor-Zen Tien
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Patent number: 11990546Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.Type: GrantFiled: March 13, 2023Date of Patent: May 21, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Hua Yang, Chih-Chien Chang, Shen-De Wang
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Patent number: 11990258Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.Type: GrantFiled: September 28, 2022Date of Patent: May 21, 2024Assignee: POLYTRONICS TECHNOLOGY CORP.Inventors: Hsiu-Che Yen, Yung-Hsien Chang, Cheng-Yu Tung, Chen-Nan Liu, Chia-Yuan Lee, Yu-Chieh Fu, Yao-Te Chang, Fu-Hua Chu
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Publication number: 20240163932Abstract: A multi-link operation (MLO) transmission method is provided. The MLO transmission method may be applied to an apparatus. The MLO transmission method may include the following steps. A plurality of station (STA) modules of the apparatus may each perform a respective backoff procedure. Each STA module may correspond to a different link. An MLO control circuit of the apparatus or a first STA module of the plurality of STA modules may determine whether to perform a synchronous transmission (TX) for a first STA module and at least one of other STA modules in response to a first backoff counter of the first STA module reaching 0.Type: ApplicationFiled: November 9, 2023Publication date: May 16, 2024Inventors: Hao-Hua KANG, Chih-Chun KUO, Cheng-Ying WU, Yang-Hung PENG
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Publication number: 20240157575Abstract: A humanoid finger mechanism includes: a finger seat; at least one proximal knuckle, located at an outer side of the finger seat; at least one middle knuckle, located at an outer side of the at least one proximal knuckle; a distal knuckle, located at an outer side of the at least one middle knuckle; a driver, located at an inner side of the finger seat; a driving cable, wherein a first end of the driving cable is connected with the driver, while a second end of the driving cable is connected with the distal knuckle after sequentially penetrating through the finger seat, the at least one proximal knuckle and the at least one middle knuckle; and a tension band, a first end of the tension band is connected with the finger seat, while a second end of the tension band is connected with the distal knuckle.Type: ApplicationFiled: November 29, 2021Publication date: May 16, 2024Applicant: CHANGZHOU INSTITUTE OF TECHNOLOGYInventors: Hongliang HUA, Shihong WU, Xiaofeng WU, Yongjiang CHEN, Xiaojun WANG, Cheng HUANG
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Publication number: 20240163785Abstract: A method for performing wireless communication in MLO architecture is applicable to an AP MLD connected with a non-AP MLD through multiple links. The multiple links include at least a first link and a second link, the non-AP MLD operates in ML-SMPS mode. The method includes transmitting an initial control frame to the non-AP MLD via the first link, to trigger at least one link of the multiple links to be activated at the non-AP MLD to support a reception with respective negotiated number of spatial streams, receiving a response frame via the first link in response to the transmission of the initial control frame, and initiating frame exchange between the AP MLD and the non-AP MLD via a target link of the at least one link. The target link is selected from the at least one link according to the response frame. The first link is a primary link.Type: ApplicationFiled: October 31, 2023Publication date: May 16, 2024Applicant: MEDIATEK INC.Inventors: Hao-Hua Kang, Cheng-Ying Wu, Chien-Fang Hsu, Chih-Chun Kuo
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Publication number: 20240163947Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.Type: ApplicationFiled: November 8, 2023Publication date: May 16, 2024Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
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Patent number: 11984477Abstract: A semiconductor-on-insulator (SOI) substrate includes a handle substrate, a charge-trapping layer located over the handle substrate and including nitrogen-doped polysilicon, an insulating layer located over the charge-trapping layer, and a semiconductor material layer located over the insulating layer. The nitrogen atoms in the charge-trapping layer suppress grain growth during anneal processes used to form the SOI substrate and during subsequent high temperature processes used to form semiconductor devices on the semiconductor material layer. Reduction in grain growth reduces distortion of the SOI substrate, and facilitates overlay of lithographic patterns during fabrication of the semiconductor devices. The charge-trapping layer suppresses formation of a parasitic surface conduction layer, and reduces capacitive coupling of the semiconductor devices with the handle substrate during high frequency operation such as operations in gigahertz range.Type: GrantFiled: June 13, 2022Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Cheng-Ta Wu, Chui Hua Chen
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Publication number: 20240145132Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.Type: ApplicationFiled: March 16, 2023Publication date: May 2, 2024Inventors: CHENG-YU TUNG, CHEN-NAN LIU, Chia-Yuan Lee, HSIU-CHE YEN, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240145133Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.Type: ApplicationFiled: April 5, 2023Publication date: May 2, 2024Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, CHENG-YU TUNG, HSIU-CHE YEN, Chia-Yuan LEE, Yao-Te CHANG, FU-HUA CHU
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Patent number: 11973260Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.Type: GrantFiled: November 9, 2022Date of Patent: April 30, 2024Assignee: Industrial Technology Research InstituteInventors: Ruo-Lan Chang, Mei-Ju Lee, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei-Chung Chen
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Patent number: 11969097Abstract: An inflatable product includes an inflatable chamber and a supplemental layer. The supplemental layer is disposed on the inflatable chamber. Further, the supplemental layer is directly or indirectly fixed to the inflatable chamber by sewing. The inflatable chamber is made of plastic. The material of the supplemental layer is different from that of the inflatable chamber.Type: GrantFiled: January 21, 2021Date of Patent: April 30, 2024Assignee: INNOVATOR PLASTIC & ELECTRONICS (HUIZHOU) CO LTDInventors: Cheng-Chung Wang, Chien-Hua Wang, Yao-Hua Wang