Patents by Inventor CHENG-HUNG HSIAO

CHENG-HUNG HSIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145327
    Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.
    Type: Application
    Filed: December 27, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Jung Hsueh, Cheng-Nan Lin, Wan-Yu Chiang, Wei-Hung Lin, Ching-Wen Hsiao, Ming-Da Cheng
  • Publication number: 20130076149
    Abstract: An exemplary power-on control circuit includes power supplies and a control chip. Each power supply includes a power good pin to output a power good signal and an enable pin to receive an enable signal. When the enable pin of one power supply receives an enable signal, the one power supply will be powered on. When one power supply is powered on successfully, the power good pin of the one power supply will output a power good signal. The control chip includes input ports and output ports. Each input port corresponding to one output port. Each input port is connected to the power good pin of one power supply to receive a power good signal from the one power supply, and its corresponding output ports is connected to the enable pin of the one power supply to output an enable signal to the one power supply.
    Type: Application
    Filed: October 23, 2011
    Publication date: March 28, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: MENG-CHE YU, CHENG-HUNG HSIAO