Abstract: The present disclosure provides msect-4 molecular sieves with OFF and ERI topologies, a preparation method therefor, and applications thereof. An eight-membered ring small pore molecular sieve used as a raw material is dispersed in an aqueous phase. Following that, caustic potash, an aluminum source, and an organic structure-directing agent (OSDA) are added. The pH value is then adjusted to be greater than 10, and a silicon source is introduced to attain the desired silicon-aluminum ratio, followed by stirring reaction, aging, crystallization, filtration, washing, ammonia exchange reaction, drying, and calcination. The msect-4 molecular sieves with OFF and ERI topologies, the preparation method therefor, and applications exhibit excellent hydrothermal stability, a plurality of adsorption sites exposed by a regular bone-like structure, and a large specific surface area.

Abstract: The present disclosure provides molecular sieves with intergrown phases of AEI and CHA topologies and a catalyst thereof. A preparation method for the molecular sieves include the following steps: mixing a hydroxyphosphono organic alkali R with an aluminum source and a silicon source to obtain a sol-gel precursor, putting the sol-gel precursor into a closed hydrothermal synthesis reactor for reaction, filtering the reaction solution, washing, drying, and calcination to obtain the molecular sieves with intergrown phases of AEI and CHA topologies. The molecular sieves and the catalyst thereof can be directly synthesized under mild conditions with a hydroxyphosphono organic alkali as a structure-directing agent and a phosphorus source, have a pH value of 6-9 and low requirements for corrosion resistance of production devices, and are suitable for large-scale production.

Abstract: A method for protecting a power system having inverter-interfaced renewable energy sources is provided. The power system includes an inverter and a control system. The control system includes a current controller including a saturation limiter and a proportional and integral (PI) controller, a phase-locked system, and a low-voltage ride-through (LVRT)control unit. The method includes: by using a Park transformation matrix, determining an output voltage of the inverter; determining a modulated voltage of the output voltage; upon detecting a grid fault, obtaining current references by the LVRT control unit; determining a fault current in a first stage of a transient phase of the grid fault; determining a fault current in a second stage of the transient phase; determining a fault current in a third stage of the transient phase; and switching the control system to a fault control mode by tracking the fault currents in the first, second and third stages, to the current references.

Abstract: A method for manufacturing a transparent circuit board includes the following steps. A composite substrate including a conductive layer and a transparent insulating layer on the conductive layer is provided. A wiring groove is formed on the transparent insulating layer by laser ablation and a carbon black layer is formed on an inner wall of the wiring groove. The wiring groove penetrates the transparent insulating layer, the wiring groove extends toward the conductive layer to pass through a part of the conductive layer. A conductive wiring corresponding to the wiring groove is formed and fully fills the wiring groove. A black oxide treatment is performed on a surface of the conductive wiring facing away from the conductive layer to form a blackened layer. A transparent cover film is pressed on a side of the transparent insulating layer facing away from the conductive layer. The conductive layer is removed.

Abstract: A light-emitting diode device includes an epitaxial structure that contains first-type and second-type semiconductor units and an active layer interposed therebetween, a light transmittable dielectric element that is disposed on the first-type semiconductor unit opposite to the active layer and is formed with a first through hole, an adhesive layer that is disposed on the dielectric element and is formed with a second through hole corresponding in position to the first through hole, and a metal contact element that is disposed on the adhesive layer. The adhesive layer has a thickness of at most one fifth of that of the dielectric element. The metal contact element extends into the first and second through holes, and electrically contacts the first-type semiconductor unit. A method for manufacturing the LED device is also disclosed.

Abstract: A system can determine by which path/tunnel an Internet destination can be best reached for a user with an IP address from a static BGP range. The system looks up the destination address in an egress map. This map can either specify a tunnel that should be used for encapsulation for static BGP, or (when tunnel is not present) cause the system to send out unencapsulated traffic, in which the traffic follows normal BGP routing on a border network.

Abstract: A method of manufacturing a display module which is able to present a split-screen display without a black line prominent at the boundary includes: providing a first circuit substrate including a plurality of first pads, providing a second circuit substrate including a plurality of second pads; bonding the first circuit substrate and the second circuit sub state onto a surface of a heat dissipation plate through a first heat conductive adhesive; and mounting a plurality of light emitting diodes onto the first conductive wiring layer and the third conductive wiring layer, where one light emitting diodes is electrically connected to two first pad, one light emitting diode is electrically connected to one first pad and one second pad, and one light emitting diode is electrically connected to two second pads. A display module including light emitting diodes is also disclosed.

Abstract: A transparent circuit board includes a conductive wiring, a transparent insulating layer, and a cover film. The transparent insulating layer and the cover film are stacked along a stacking direction. The conductive wiring penetrates the transparent insulating layer along the stacking direction, and is at least partially embedded in the transparent insulating layer. A blackened layer is formed on a surface of the conductive wiring combined with the cover film, a carbon black layer is formed on a surface of the conductive wiring without the blackened layer, thereby improving a light transmittance of the transparent circuit board. The present invention also provides a method for manufacturing the transparent circuit board.

Abstract: A method for manufacturing a circuit board includes providing an insulating substrate, defining a through hole in the insulating substrate, forming a first conductive layer on two surfaces of the insulating substrate and on an inner wall of the through hole, forming a phase change material layer on a surface of each first conductive layer, forming a seed layer on a surface of the first conductive layer, forming a second conductive layer on a surface of the seed layer, and etching the seed layer, the first conductive layer, and the second conductive layer, so that a first conductive circuit layer and a second conductive circuit layer are respectively formed on two opposite surfaces of the insulating substrate, so that the phase change material layer is embedded in the first conductive circuit layer and in the second conductive circuit layer. The application also provides a circuit board.

Abstract: A multi-layer circuit board with embedded components (100) in multiple layers and miniaturized form, with embedded electronic elements in a higher element density and shorter voltage paths includes a circuit board (10) provided with a mounting groove (101), and a plurality of elements (20). The elements (20) are arranged in the mounting groove (101), and the circuit board (10) includes several vertically-stacked circuit substrates (11, 12, 13, 14) arranged around the mounting groove (101), The multi-layer circuit board with embedded components circuit board (100) includes a conductive member (30) arranged in the mounting groove (101) and electrically connecting the elements (20) and the layers of conductive circuits.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a channel layer and an active layer over a substrate; forming a doped epitaxial layer over the active layer; patterning the doped epitaxial layer, the active layer, and the channel layer to form a fin structure comprising a doped epitaxial fin portion, an active fin portion below the doped epitaxial fin portion, and a channel fin portion below the active fin portion; removing the doped epitaxial fin portion; and forming a gate electrode at least partially extending along a sidewall of the fin structure to form a Schottky barrier between the gate electrode and the fin structure after removing the doped epitaxial fin portion.

Abstract: A method for manufacturing a circuit board includes providing an insulating substrate, defining a through hole in the insulating substrate, forming a first conductive layer on two surfaces of the insulating substrate and on an inner wall of the through hole, forming a phase change material layer on a surface of each first conductive layer, forming a seed layer on a surface of the first conductive layer, forming a second conductive layer on a surface of the seed layer, and etching the seed layer, the first conductive layer, and the second conductive layer, so that a first conductive circuit layer and a second conductive circuit layer are respectively formed on two opposite surfaces of the insulating substrate, so that the phase change material layer is embedded in the first conductive circuit layer and in the second conductive circuit layer. The application also provides a circuit board.

Abstract: A method for manufacturing such multilayer printed circuit board includes providing a metal laminated structure including a first type metal layer and a second type metal layer, pressing a patterned dry film layer and a protective film layer on two surfaces of the metal laminated structure, the dry film layer exposing the second type metal layer; etching the second type metal layer to form a first conductive circuit layer; etching a first type metal layer to form a second conductive circuit layer, the first conductive circuit layer and the second conductive circuit layer defining an inner circuit laminated structure; removing the dry film layer; and forming a first adding-layer circuit base board and a second adding-layer circuit base board on two surfaces of the inner laminated structure.

Abstract: A multilayer printed circuit board providing large current and high power includes an inner circuit laminated structure, a first adding-layer circuit base board, and second adding-layer circuit base board. The inner circuit laminated structure includes at least one first type and second type conductive circuit layer alternately stacked. The first and second type conductive circuit layer are respectively made of first and second type metal layer, the first and second type metal layer have different etching ability. The second adding-layer circuit base board and the first adding-layer circuit base board are formed on opposite surfaces of the inner circuit laminated structure. The first and second adding-layer circuit base boards are electrically connected to the inner circuit laminated structure. The disclosure also provides a method for manufacturing such multilayer printed circuit board.

Abstract: Described herein are techniques to enable a mobile device to perform multi-source estimation of an altitude for a location. A baseline altitude may be determined at ground level for a location and used to calibrate a barometric pressure sensor on the mobile device. The calibrated barometric pressure sensor can then estimate changes in altitude relative to ground level based on detected pressure differentials, allowing a relative altitude to ground to be determined. Baseline calibration for the barometric sensor calibration can be performed to determine an ambient ground-level barometric pressure.

Abstract: A multilayer printed circuit board providing large current and high power includes an inner circuit laminated structure, a first adding-layer circuit base board, and second adding-layer circuit base board. The inner circuit laminated structure includes at least one first type and second type conductive circuit layer alternately stacked. The first and second type conductive circuit layer are respectively made of first and second type metal layer, the first and second type metal layer have different etching ability. The second adding-layer circuit base board and the first adding-layer circuit base board are formed on opposite surfaces of the inner circuit laminated structure. The first and second adding-layer circuit base boards are electrically connected to the inner circuit laminated structure. The disclosure also provides a method for manufacturing such multilayer printed circuit board.

Abstract: A flexible printed circuit board includes a base layer and a pattern line. At least one communication hole penetrating opposite surfaces of the base layer. The pattern line includes two conductive circuit layers formed on the opposite surfaces of the base layer. At least one conductive pole are formed in the at least one communication hole and electrically connects the two conductive circuit layers. A gap being is formed between the conductive pole and the base layer.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a channel layer and an active layer over a substrate; forming a doped epitaxial layer over the active layer; patterning the doped epitaxial layer, the active layer, and the channel layer to form a fin structure comprising a doped epitaxial fin portion, an active fin portion below the doped epitaxial fin portion, and a channel fin portion below the active fin portion; removing the doped epitaxial fin portion; and forming a gate electrode at least partially extending along a sidewall of the fin structure to form a Schottky barrier between the gate electrode and the fin structure after removing the doped epitaxial fin portion.

Abstract: A semiconductor device includes a substrate, a channel layer, an active layer, and a gate electrode. The channel layer has a fin portion over the substrate. The active layer is over at least the fin portion of the channel layer. The active layer is configured to cause a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate electrode is in contact with a sidewall of the fin portion of the channel layer.

Abstract: A composite circuit board includes an insulation layer, an inner circuit layer, a first conductive layer and a second conductive layer embedded in the insulation layer, a third conductive layer and a fourth conductive layer formed on opposite surfaces of the insulation layer. The third conductive layer electrically connects with the first conductive layer. The fourth conductive layer electrically connects with the second conductive layer. The inner circuit layer is in a middle portion of the insulation layer. The first conductive layer and the second conductive layer respectively forms on opposite sides of the inner circuit layer. The insulation layer forms a plurality of first through holes between the first conductive layer and the inner circuit layer, a plurality of second through holes between the second conductive layer and the inner circuit layer.