Abstract: The implementation of this application provides a power management method, a terminal. The method includes: obtaining a configuration change signal of a terminal device in response to a configuration change of the terminal device; obtaining an output power level truth table of the terminal device based on the configuration change signal of the terminal device, where the output power level truth table includes a configuration of the terminal device and a power level and a fallback power of the terminal device in the configuration; obtaining the power level and the fallback power of the terminal device based on the output power level truth table; setting an output power of the terminal device based on the fallback power of the terminal device, and outputting a corresponding power value based on the power level.

Abstract: Conventional email filtering services are not suitable for recognizing sophisticated malicious emails, and therefore may allow sophisticated malicious emails to reach inboxes by mistake. Introduced here are threat detection platforms designed to take an integrative approach to detecting security threats. For example, after receiving input indicative of an approval from an individual to access past email received by employees of an enterprise, a threat detection platform can download past emails to build a machine learning (ML) model that understands the norms of communication with internal contacts (e.g., other employees) and/or external contacts (e.g., vendors). By applying the ML model to incoming email, the threat detection platform can identify security threats in real time in a targeted manner.

Abstract: The present disclosure provides systems and methods for image filtering. The method may include obtaining an initial image block from a reconstructed image; determining at least one candidate image block by performing a filtering operation on the initial image block using at least one trained machine learning model; and determining a target image block based on the at least one candidate image block.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.

Abstract: A display panel includes a gate electrode, a source electrode, a drain electrode, and a metal oxide layer disposed corresponding to the gate electrode. The metal oxide layer includes a lower metal oxide layer and an upper metal oxide layer stacked on the lower metal oxide layer. The lower metal oxide layer includes an indium oxide and a lanthanoid oxide. The upper metal oxide layer is located on a surface of the lower metal oxide layer adjacent to the source electrode and the drain electrode. The source electrode and the drain electrode are connected to the upper metal oxide layer. The upper metal oxide layer includes an indium oxide and a lanthanoid oxide, and the upper metal oxide layer includes polycrystalline phase.

Abstract: A computer-implemented method is provided for model training performed by a processing system. The method comprises determining a set of first weights based on a first matrix associated with a source model, determining a set of second weights based on the set of first weights, forming a second matrix associated with a target model based on the set of first weights and the set of second weights, initializing the target model based on the second matrix, and training the target model.

Abstract: A switch switching method and a related apparatus. The method includes: receiving, by an MIPI switch, an MIPI instruction, and parsing the MIPI instruction preliminarily, to obtain an address and a control instruction in the MIPI instruction; determining, by the MIPI switch, whether the address in the MIPI instruction is the same as an address of the MIPI switch; if the addresses are the same, writing the control instruction into a data register of the MIPI switch; transmitting, by the MIPI switch, the control instruction in the data register of the MIPI switch to a mode identification module; determining, by the mode identification module, which control instruction bits control the MIPI switch, and sending these control instruction bits to a translator in the MIPI switch; and translating, by the translator in the MIPI switch, the control instruction into a component status.

Abstract: A voltage regulator having a multiple of main stages and at least one accelerated voltage regulator (AVR) bridge is provided. The main stages may respond to low frequency current transients and provide DC output voltage regulation. The AVR bridges are switched much faster than the main stages and respond to high frequency current transients without regulating the DC output voltage. The AVR bridge frequency response range can overlap with the main stage frequency response range, and the lowest frequency to which the AVR bridges respond may be set lower than the highest frequency to which the main stages respond.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for memory mapping to enhance data cube performance. In some implementations, a system accesses a data set that includes data to be processed into a data cube. The system generates a memory-mapped data cube that includes a plurality of files including different segments of the data cube. Generating the memory-mapped data cube includes allocating memory-mapped buffers in non-volatile data storage and responding to subsequent memory allocation requests with addresses for the buffers such that components of the data cube are accumulated in the buffers. The memory-mapped data cube is loaded by storing the files of the data cube in disk-based storage, mapping the stored files of the data cube to virtual memory addresses, and caching portions of the data cube in random-access memory.

Abstract: A memory device includes: a first conductor extending in parallel with a first axis; a first selector material comprising a first portion that extends along a first sidewall of the first conductor; a second selector material comprising a first portion that extends along the first sidewall of the first conductor; a first variable resistive material comprising a portion that extends along the first sidewall of the first conductor; and a second conductor extending in parallel with a second axis substantially perpendicular to the first axis, wherein the first portion of the first selector material, the first portion of the second selector material, and the portion of the first variable resistive material are arranged along a first direction in parallel with a third axis substantially perpendicular to the first axis and second axis.

Abstract: The present disclosure provides a method and system for optimizing first-diffraction-order reconstruction of holograms, a device and a medium, and relates to the field of image processing. The method includes: acquiring a target image; determining a target image light field according to the target image; calculating a target diffraction field for the target image light field by performing backward propagation by a set distance; constructing a U-Net network model; and inputting the target diffraction field into a trained U-Net network model to acquire an optimized hologram. The trained U-Net network model is obtained by constructing a U-Net network model and training and optimizing the U-Net network model, thereby continuously improving the quality of the zero-diffraction-order reconstructed image of the initial hologram and finally achieving the effect of optimizing the first-diffraction-order reconstructed image of the hologram.

Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.

Abstract: An automatic righting system includes a discrimination calibration module, a righting module, and a controller. The discrimination calibration module includes a distance sensing unit. The distance sensing unit is located at the front end of the glasses and configured to acquire the distance between the distance sensing unit and a first feature position. The righting module includes a push-up air cushion. The push-up air cushion is mounted at the front end of the glasses. The push-up air cushion is configured to be inflated to push the glasses to move upward. The controller is electrically connected to the distance sensing unit and the push-up air cushion. The controller is configured to control the push-up air cushion to start or stop to right the glasses according to a distance signal of the distance sensing unit.

Abstract: Embodiments of this application relate to the field of terminal technologies, and provides a millimeter wave module circuit and a terminal device. The first antenna array includes N first antennas, and the second antenna array includes M second antennas, where N is greater than M. The processing module includes a plurality of first processing units. Each of N first antennas is connected to each first processing unit. Each of M second antennas is separately connected to two different first processing units. The first processing unit includes a power amplifier. The processing module is configured to send, through differential feeding, a second signal to the second antenna by using two different first processing units. This can enable a signal coverage of the second antenna array to be increased, improving performance of a millimeter wave module in a coverage region of the second antenna array.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A smart acoustic information recognition-based welded weld impact quality determination method and system, comprising: controlling a tip of an ultrasonic impact gun (1) to perform impact treatment on a welded weld with different treatment pressures, treatment speeds, treatment angles and impact frequencies, obtaining acoustic signals during the impact treatment, calculating feature values of the acoustic signals, and constructing an acoustic signal sample set including various stress conditions; marking the acoustic signal sample set according to impact treatment quality assessment results for the welded weld; establishing a multi-weight neural network model, and using the marked acoustic signal sample set to train the multi-weight neural network model; obtaining feature values of welded weld impact treatment acoustic signals to be determined, inputting the feature values into the trained multi-weight neural network model, and outputting determination results for welded weld impact treatment quality to be det

Abstract: A memory device includes a multi-layer stack, a channel layer, a memory material layer and at least three conductive pillars. The multi-layer stack is disposed on a substrate and includes a plurality of conductive layers and a plurality of dielectric layers stacked alternately. The channel layer and memory material layer penetrate through the plurality of conductive layers and the plurality of dielectric layers. The at least three conductive pillars are surrounded by the channel layer and the memory material layer, wherein the at least three conductive pillars are electrically connected to conductive layers respectively. The at least three conductive pillars includes a first, a second and a third conductive pillars disposed between the first conductive pillar and the second conductive pillar. A third width of the third conductive pillar is smaller than a first width of the first conductive pillar and a second width of the second conductive pillar.

Abstract: A computer device, obtains a mammographic image of a unilateral breast. The mammographic image includes a cranial-caudal (CC)-position mammographic image and a mediolateral-oblique (MLO)-position mammographic image. The computer device invokes a breast detection model to perform a prediction of a condition of the unilateral breast according to the CC-position mammographic image and the MLO-position mammographic image. The device obtains a prediction result of the unilateral breast, and generates and outputs a detection report that includes the prediction result.

Abstract: A 3D medical image recognition method and apparatus, a device, a non-transitory computer-readable storage medium, and a computer program product are provided, which relate to the field of artificial intelligence. View rearrangement processing is performed in an ith-round feature extraction process on an (i?1)th-round 3D medical image feature to obtain 2D image features. The (i?1)th-round 3D medical image feature is obtained by performing (i?1)th-round feature extraction on a 3D medical image. Different 2D image features are features of the (i?1)th-round 3D medical image feature in different views. Semantic feature extraction processing is performed on each 2D image feature in different views. Feature fusion processing is performed on the image semantic features to obtain an ith-round 3D medical image feature. Image recognition processing is performed on an Ith-round 3D medical image feature obtained through Ith-round feature extraction to obtain image recognition of the 3D medical image.

Abstract: A radio frequency conduction test method and a test system are provided. The test method includes: moving a radio frequency test probe to a first pad of a board so as to allow a test signal on the first pad to be transmitted to the radio frequency test probe and then transmitted to a radio frequency test instrument for a radio frequency conduction test, where the test signal in the radio frequency test probe is transmitted to the radio frequency test instrument via an impedance conversion apparatus and a directional coupler, a straight-through output port of the directional coupler is connected to a first measurement port of the radio frequency test instrument, and a coupling output port of the directional coupler is connected to a second measurement port of the radio frequency test instrument.