Patents by Inventor Cheng-Ping Wang
Cheng-Ping Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11979479Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.Type: GrantFiled: January 16, 2023Date of Patent: May 7, 2024Assignees: Chung Yuan Christian University, KGI Securities Co. Ltd.Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
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Publication number: 20240137431Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.Type: ApplicationFiled: January 16, 2023Publication date: April 25, 2024Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
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Publication number: 20240110977Abstract: A comparator testing circuit and a testing method are provided. The comparator testing circuit includes a switching circuit, a comparator, and a determination circuit. The switching circuit receives a first signal, a second signal, and a switching signal, and outputs one of the first signal and the second signal as a first input signal and the other of the first signal and the second signal as a second input signal according to the switching signal. The comparator compares the first input signal with the second input signal to generate an output signal. The determination circuit determines whether the comparator is abnormal based on the switching signal and the output signal to generate an exception flag.Type: ApplicationFiled: September 25, 2023Publication date: April 4, 2024Applicant: Nuvoton Technology CorporationInventors: Chih-Ping Lu, Cheng-Chih Wang
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Publication number: 20240078149Abstract: A method, computer system, and computer program product for data monitoring management are provided. A first invalid zero value candidate from a data stream is received. A memory location for the first invalid zero value candidate is received. At a first time an access connection to the memory location is established. At a second time subsequent to the first time the access connection to the memory location is checked. Based on the checking, a determination is made whether the first invalid zero value candidate contains an invalid zero value.Type: ApplicationFiled: September 7, 2022Publication date: March 7, 2024Inventors: Bo Chen Zhu, Cheng Fang Wang, Ai Ping Feng, Xinzhe Wang, Yan Ting Li, Hong Yan Gu
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Patent number: 11912761Abstract: The present invention is directed to antigen binding proteins and in particular to IL-1? antigen binding proteins. The present invention further provides compositions comprising the antigen binding proteins, use of the antigen binding proteins and methods for production.Type: GrantFiled: January 15, 2021Date of Patent: February 27, 2024Assignee: Agency for Science, Technology and ResearchInventors: Cheng-I Wang, Angeline Goh, Siok Ping Yeo, Alessandra Rosa Mortellaro, Subhra Kumar Biswas, Florent Ginhoux, Pingyu Zhong
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Patent number: 9676020Abstract: A fine blanking device characterized by a trough structure is provided. Preferably, the fine blanking device comprises a punch, a mother die module having a first die cavity allowing the punch to enter therein, and a blank-holder module having a second die cavity allowing the punch to enter therein; wherein one or more trough structures are formed on/individually formed on the mother die module or/and the blank-holder module, wherein the trough structure is formed, surrounding the first die cavity, on the mother die module at a sheet stock contacting side thereof; or/and the trough structure is formed, surrounding the second die cavity, on the blank-holder module at a sheet stock contacting side thereof.Type: GrantFiled: August 4, 2014Date of Patent: June 13, 2017Inventor: Cheng-Ping Wang
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Publication number: 20150122101Abstract: A fine blanking device characterized by a trough structure is provided. Preferably, the fine blanking device comprises a punch, a mother die module having a first die cavity allowing the punch to enter therein, and a blank-holder module having a second die cavity allowing the punch to enter therein; wherein one or more trough structures are formed on/individually formed on the mother die module or/and the blank-holder module, wherein the trough structure is formed, surrounding the first die cavity, on the mother die module at a sheet stock contacting side thereof; or/and the trough structure is formed, surrounding the second die cavity, on the blank-holder module at a sheet stock contacting side thereof.Type: ApplicationFiled: August 4, 2014Publication date: May 7, 2015Inventor: Cheng-Ping Wang
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Publication number: 20140020534Abstract: A fine hydro-blanking device is used for blanking a sheet stock. The fine hydro-blanking device includes a clamping module and a punching module. The clamping module is used for clamping the sheet stock. The clamping module includes at least one cavity and at least one fluid flow channel. The at least one fluid flow channel runs through the clamping module. The punching module is inserted into the at least one cavity of the clamping module and contacted with the sheet stock. At least one trough is formed in the sheet stock, and the at least one fluid flow channel is in communication with the at least one trough, so that a liquid is introduced into the at least one trough through the at least one fluid flow channel to provide a liquid pressure to the sheet stock.Type: ApplicationFiled: July 17, 2012Publication date: January 23, 2014Applicant: NATIONAL TAIWAN OCEAN UNIVERSITYInventor: Cheng-Ping WANG
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Publication number: 20110025289Abstract: A two-stage switching power supply includes a first-stage power circuit, a bus capacitor, a second-stage power circuit and a power control unit. The first-stage power circuit is connected to a power bus for receiving an input voltage, and includes a first switching circuit. The input voltage is converted into a bus voltage by alternately conducting and shutting off the first switching circuit. The second-stage power circuit is connected to the power bus for receiving the bus voltage, and includes a second switching circuit. The power control unit is used for controlling operations of the first switching circuit and the second switching circuit. The bus voltage is dynamically adjusted according to electricity consumption amount of the system circuit under control of the power control unit. An operating mode of the second switching circuit of the second-stage power circuit is changed according to the electricity consumption amount of the system circuit.Type: ApplicationFiled: July 28, 2010Publication date: February 3, 2011Applicant: DELTA ELECTRONICS, INC.Inventors: Cheng-Ping Wang, Cheng-Yi Lo, Chang-Chieh Yu
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Patent number: 6651198Abstract: An improved system for testing the operation of component modules and the interconnections therebetween of an integrated circuit (10) formed on a semiconductor chip is provided which consists of several component modules, each with an associated input scan cell (76) and output scan cell (102) when necessary. A component module may have both an input scan cell (76) and an output scan cell (102) unless the input or output of that component module occurs on the boundary of the integrated circuit (10). Each output scan cell (102) has a mode select signal (122) which indicates either input test mode or output test mode. The improved scan test system uses two process steps to verify the operational integrity of the entire integrated circuit (10). During the first step of the scan test, non-adjacent component modules have their mode select signals set to output test mode, and component modules existing between the non-adjacent component modules have their mode select signals set to input test mode.Type: GrantFiled: January 7, 2000Date of Patent: November 18, 2003Assignee: Texas Instruments IncorporatedInventor: Cheng-Ping Wang