Patents by Inventor Cheng Wu

Cheng Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153895
    Abstract: Semiconductor dies of a semiconductor die package are directly bonded, and a top metal region may be formed over the semiconductor dies. A plurality of conductive terminals may be formed over the top metal region. The conductive terminals are formed of copper (Cu) or another material that enables low-temperature deposition process techniques, such as electroplating, to be used to form the conductive terminal. In this way, the conductive terminals of the semiconductor die packages described herein may be formed at a relatively low temperature. This reduces the likelihood of thermal deformation of semiconductor dies in the semiconductor die packages. The reduced thermal deformation reduces the likelihood of warpage, breakage, and/or other types of damage to the semiconductor dies of the semiconductor die packages, which may increase performance and/or increase yield of semiconductor die packages.
    Type: Application
    Filed: April 19, 2023
    Publication date: May 9, 2024
    Inventors: Harry-HakLay CHUANG, Wei-Cheng WU, Chung-Jen HUANG, Yung Chun TU, Chien Lin LIU, Shun-Kuan LIN, Ping-tzu CHEN
  • Publication number: 20240152696
    Abstract: Systems and methods are directed to training and utilizing a generative language model that is constrained by a predetermined template that is used to train the generative language model. Once trained, customer data is accessed and transmitted to an evaluation component associated with the generative language model. The generative language model generates one or more sentences based on a feedback input of the plurality of feedback inputs, whereby the one or more sentences each include a sentiment, a target, and a reason for the sentiment in a format defined by the predetermined template. The evaluation component then identifies the sentiment, the target, and the reason from a sentence of the one or more sentences. A communication is then presented, on a device of a user, based on at least the sentiment and the reason identified from the sentence. The communication can be an alert or a report.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: Vishal Anand, Ananya MISHRA, Pramodith BALLAPURAM, Cheng WU
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240141476
    Abstract: A method for manufacturing a target material is provided, including the steps of: disposing raw material powder on a substrate and melting the raw material powder by laser to form a target material layer; repeating the preceding process to allow a plurality of target material layers to form an integrated target material column; after cooling the target material column, removing the target material column from the substrate; and performing vacuum heat treatment on the target material column. Since the target material is additively manufactured and subjected to vacuum heat treatment, the target material has a finer and more uniform microstructure, thus improving the product quality.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 2, 2024
    Applicant: TAIWAN STEEL GROUP AEROSPACE ADDITIVE MANUFACTURING CORPORATION
    Inventors: William HSIEH, Bo-Chen Wu, Chii-Feng Huang, Jun-Cheng Wang
  • Publication number: 20240146403
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may detect a trigger event associated with a satellite communication link, the trigger event being based at least in part on at least one of: a status of an access link associated with the UE, or information associated with another device or a component of the UE. The UE may transmit a communication via the satellite communication link based at least in part on detecting the trigger event. Numerous other aspects are described.
    Type: Application
    Filed: July 27, 2023
    Publication date: May 2, 2024
    Inventors: Francesco GRILLI, Vivek KHANNA, Sivaramakrishna VEEREPALLI, Shailesh PATIL, Gene Wesley MARSH, Cheng TAN, Jungsik PARK, Carl HARDIN, Rashmin ANJARIA, Shuanshuan WU
  • Publication number: 20240146085
    Abstract: The present disclosure provides a battery charging system and method. The battery charging method includes: determining a degree of healthy of a battery module according to an evaluation mechanism; setting a charging standard according to the degree of healthy; by handshaking with a charger, setting a charging voltage for the charger according to the charging standard to charge the battery module; and by the charger, perform a charging operation on the battery module until a fully charged condition is satisfied.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Tsung-Nan WU, Chih-Hsiang HSU, Wei-Cheng CHEN
  • Publication number: 20240147716
    Abstract: An embedded flash memory device includes a gate stack, which includes a bottom dielectric layer extending into a recess in a semiconductor substrate, and a charge storage layer over the bottom dielectric layer. The charge storage layer includes a portion in the recess. The gate stack further includes a top dielectric layer over the charge storage layer, and a metal gate over the top dielectric layer. Source and drain regions are in the semiconductor substrate, and are on opposite sides of the gate stack.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Wei Cheng Wu, Harry-Hak-Lay Chuang
  • Publication number: 20240142833
    Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Publication number: 20240144007
    Abstract: A method of contrastive learning comprises: determining, based on a model construction criterion, a first encoder for a first modality and a second encoder for a second modality; constructing a first contrastive learning model, the first contrastive learning model comprising the first encoder and a third encoder for the second modality, and a model capacity of the third encoder being greater than a model capacity of the second encoder; performing pre-training of the first contrastive learning model based on a first training dataset for the first modality and the second modality; and providing the pre-trained first encoder in the pre-trained first contrastive learning model for a downstream task. Because only the model capacity of one encoder is increased in the pre-training stage, model performance may be improved without increasing model training overhead during downstream task fine-tuning and model running overhead during model application.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 2, 2024
    Inventors: Hao Wu, Boyan Zhou, Quan Cui, Cheng Yang
  • Publication number: 20240144100
    Abstract: Methods, apparatuses, a device, and a medium for training a contrastive learning model are provided. In a method, a plurality of sample sets for training the contrastive learning model are obtained, and the plurality of sample sets comprises a first sample set and a second sample set. A first target sample set is selected from the first sample set and the second sample set according to a predetermined rule. A first set of samples are determined based on the first target sample set according to a predefined batch size. The contrastive learning model is trained using the first set of samples. In this way, on the one hand, performance degradation of the contrastive learning model due to sample set bias may be avoided; on the other hand, a forgetting problem in the training process may be alleviated.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Hao Wu, Boyan Zhou, Quan Cui, Cheng Yang
  • Publication number: 20240135745
    Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: InnnoLux Corporation
    Inventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
  • Publication number: 20240133639
    Abstract: A low pressure drop automotive liquid-cooling heat dissipation plate and an enclosed automotive liquid-cooling cooler having the same are provided. The low pressure drop automotive liquid-cooling heat dissipation plate includes a heat dissipation plate body and three fin sets. The heat dissipation plate body has a first heat dissipation surface and a second heat dissipation surface that are opposite to each other. The first heat dissipation surface is in contact with three traction inverter power component sets, and the second heat dissipation surface is in contact with a cooling fluid. Three heat dissipation regions that are spaced equidistantly apart from each other and that have a same size are defined on the second heat dissipation surface along a flow direction of the cooling fluid, and respectively correspond to three projection areas formed by projecting three traction inverter power component sets on the second heat dissipation surface.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: CHUN-LI HSIUNG, KUO-WEI LEE, CHIEN-CHENG WU, CHUN-LUNG WU
  • Publication number: 20240133281
    Abstract: A calculation system for predicting a proppant embedding depth based on a shale softening effect is provided, including a sampling test terminal, a scheduling module, a monitoring module, and a calculation module, wherein the scheduling module, the monitoring module, and the calculation module are connected in communication, and the monitoring module is connected to an external operating system through a wireless network, wherein the external operating system is configured to perform a hydraulic fracturing operation and receive a first control signal and/or a second control signal from the monitoring module. The sampling test terminal is configured to test the samples and obtain test data. The scheduling module is configured to determine a target construction parameter.
    Type: Application
    Filed: December 23, 2023
    Publication date: April 25, 2024
    Applicant: SOUTHWEST PETROLEUM UNIVERSITY
    Inventors: Cong LU, Qijun ZENG, Jianchun GUO, Jiaxing LIU, Jun WU, Junkai LU, Cheng LUO, Guangqing ZHOU, Xianbo MENG, Jiandong WANG, Yanhui LIU, Xiaoshan WANG, Xin SHAN
  • Publication number: 20240134204
    Abstract: A positioning method and device, the method including: extracting multiple light spots from a current image frame, wherein the current image frame is an image currently collected by an extended reality device; determining an interference light spot in the multiple light spots according to information about a historical interference light spot, and removing the interference light spot in the multiple light spots, recognizing whether there is a light spot of a luminous light source in remaining light spots after removing the interference light spot, wherein the luminous light source is a light source set on a human-computer interaction apparatus, and the human-computer interaction apparatus is used for a user to interact with the extended reality device; determining a current pose of the human-computer interaction apparatus according to the light spot of the luminous light source recognized in the remaining light spots.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 25, 2024
    Inventors: Yunlong LI, Qinglin CHEN, Cheng CHEN, Junliang SHAN, Tao WU
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Patent number: 11967563
    Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
  • Patent number: D1023935
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Ya-Hao Chan, Yi-Heng Lee, Ming-Cheng Wu, Chun-Yu Chen
  • Patent number: D1024809
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: April 30, 2024
    Inventors: Cheng Gong, Wenlong Wu