Patents by Inventor Cheng-Yu Lee
Cheng-Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990258Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.Type: GrantFiled: September 28, 2022Date of Patent: May 21, 2024Assignee: POLYTRONICS TECHNOLOGY CORP.Inventors: Hsiu-Che Yen, Yung-Hsien Chang, Cheng-Yu Tung, Chen-Nan Liu, Chia-Yuan Lee, Yu-Chieh Fu, Yao-Te Chang, Fu-Hua Chu
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Patent number: 11983271Abstract: A processor may generate an enforcement point. The enforcement point may include one or more adversarial detection models. The processor may receive user input data. The processor may analyze, at the enforcement point, the user input data. The processor may determine, from the analyzing, whether there is an adversarial attack in the user input data. The processor may generate an alert based on the determining.Type: GrantFiled: November 19, 2020Date of Patent: May 14, 2024Assignee: International Business Machines CorporationInventors: Bruno dos Santos Silva, Cheng-Ta Lee, Ron Williams, Bo-Yu Kuo, Chao-Min Chang, Sridhar Muppidi
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Publication number: 20240145596Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
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Publication number: 20240145133Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.Type: ApplicationFiled: April 5, 2023Publication date: May 2, 2024Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, CHENG-YU TUNG, HSIU-CHE YEN, Chia-Yuan LEE, Yao-Te CHANG, FU-HUA CHU
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Publication number: 20240145132Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.Type: ApplicationFiled: March 16, 2023Publication date: May 2, 2024Inventors: CHENG-YU TUNG, CHEN-NAN LIU, Chia-Yuan Lee, HSIU-CHE YEN, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240136305Abstract: The present disclosure provides a 3D memory device such as a 3D AND flash memory and a method of forming a seal structure. The 3D memory device includes a chip region including a chip array and a seal region including a seal structure. The seal structure includes a ring-shaped stack structure disposed on a substrate and surrounding the chip array and a dummy channel pillar array penetrating through the ring-shaped stack structure and including a first dummy channel pillar group and a second dummy channel pillar group. The first dummy channel pillar group includes first dummy pillars that are arranged in a first direction and a second direction crossing the first direction to surround the chip array. The second dummy channel pillar group includes second dummy pillars that are arranged in the first direction and the second direction to surround the chip array. The first and the second dummy channel pillars are staggered with each other in the first and second directions.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Applicant: MACRONIX International Co., Ltd.Inventors: Cheng-Yu Lee, Teng-Hao Yeh
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Publication number: 20240127988Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.Type: ApplicationFiled: March 2, 2023Publication date: April 18, 2024Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240127989Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.Type: ApplicationFiled: January 25, 2023Publication date: April 18, 2024Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
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Patent number: 11957667Abstract: Methods of treating a disease caused by a positive strand RNA virus. The methods include administering to a subject in need thereof an effective amount of a compound of Formula I or Formula II.Type: GrantFiled: July 7, 2021Date of Patent: April 16, 2024Assignee: National Health Research InstitutesInventors: Shiow-Ju Lee, Cheng-Wei Yang, Yue-Zhi Lee, Hsing-Yu Hsu
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Publication number: 20240113856Abstract: The present invention provides an encryption determining method. The method includes the following steps: receiving a side channel signal; generating a filtered side channel signal by filtering noise within the side channel signal; generating a phasor signal by utilizing a filter to covert the filtered side channel signal; locating the encrypted segment by calculating a periodicity of the phasor signal utilizing a standard deviation window; extracting at least one encrypted characteristic from the encrypted segment; and generating an encryption analytic result by recognizing the at least one encrypted characteristic according to a characteristic recognition model; wherein the encryption analytic result includes a position of the encrypted segment within the side channel signal, and an encryption type corresponding to the side channel signal. The present invention is able to automatically and efficiently locate the encryption segment and analyze the encryption type corresponding to the side channel signal.Type: ApplicationFiled: October 31, 2022Publication date: April 4, 2024Applicant: INSTITUTE FOR INFORMATION INDUSTRYInventors: Jian-Wei LIAO, Cheng-En LEE, Ting-Yu LIN
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Publication number: 20240097011Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.Type: ApplicationFiled: December 1, 2023Publication date: March 21, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITEDInventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
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Publication number: 20240076422Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.Type: ApplicationFiled: September 1, 2023Publication date: March 7, 2024Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
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Patent number: 11899945Abstract: A method for performing communications specification version control of a memory device in predetermined communications architecture with aid of compatibility management, associated apparatus and computer-readable medium are provided.Type: GrantFiled: March 28, 2022Date of Patent: February 13, 2024Assignee: Silicon Motion, Inc.Inventors: Hong-Ren Fang, Chun-Che Yang, Cheng-Yu Lee, Te-Kai Wang
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Publication number: 20230413552Abstract: A three-dimensional flash memory device may be a AND flash memory device. The three-dimensional flash memory device includes: a substrate, a gate stack structure, a plurality of slit structures, a plurality of memory arrays, and a plurality of conductive pillars. The gate stack structure is located above the substrate. The plurality of slit structures extend through the gate stack structure and divide the gate stack structure into a plurality of blocks. The plurality of memory arrays are disposed in the gate stack structure of the plurality of blocks. The plurality of conductive pillars extends through the gate stack structure in the plurality of blocks, and disposed between the plurality of memory arrays and between the plurality of slit structures.Type: ApplicationFiled: June 21, 2022Publication date: December 21, 2023Applicant: MACRONIX International Co., Ltd.Inventors: Hang-Ting Lue, Teng Hao Yeh, Cheng-Yu Lee, Wei-Chen Chen
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Patent number: 11755439Abstract: A memory controller coupled to a memory device and configured to control access operations of the memory device includes a host interface and a microprocessor. The microprocessor is coupled to the host interface and configured to set a value of a predetermined parameter to a specific value after the memory controller powers up and start to perform a link flow to try to establish a transmission link via the host interface. The predetermined parameter is one of a plurality of capability parameters of the host interface and the predetermined parameter is related to reception of the host interface. After the link flow is completed, the microprocessor is further configured to identify an object device with which the host interface establishes the transmission link according to the specific value and at least one of a plurality of attribute parameters associated with the transmission link.Type: GrantFiled: March 22, 2022Date of Patent: September 12, 2023Assignee: Silicon Motion, Inc.Inventors: Cheng-Yu Lee, Te-Kai Wang
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Publication number: 20230265635Abstract: A multi-piece pre-assembled raft foundation is provided and includes pre-assemble bottom layer rebars of foundation slab, foundation steel columns, upper layer rebars of the foundation slab, and foundation rebars. The pre-assembled raft foundation is transported to a construction site for final assembly. A construction method of the multi-piece pre-assembled raft foundation is also provided.Type: ApplicationFiled: February 17, 2023Publication date: August 24, 2023Inventors: Fu-Yuan Lu, Ju-Chuan Ko, Ying-Ying Lu, Chien-Hui Lu, Cheng-Yu Lee, Mei-Hua Chien, Guang-Le Su, Sen Taner
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Publication number: 20230217655Abstract: A three-dimensional AND flash memory device includes a gate stack structure and a silt. The silt extends along a first direction and divides the gate stack structure into a plurality of sub-blocks. Each sub-block includes a plurality of rows, and each row includes a plurality of channel pillars, a plurality of charge storage structures, and a plurality of pairs of conductive pillars. The plurality of pairs of conductive pillars are arranged in the plurality of channel pillars and penetrate the gate stack structure, and are respectively connected to the plurality of channel pillars. Each pair of conductive pillars includes a first conductive pillar and a second conductive pillar separated from each other along a second direction. There is an acute angle between the second direction and the first direction.Type: ApplicationFiled: January 6, 2022Publication date: July 6, 2023Applicant: MACRONIX International Co., Ltd.Inventors: Cheng-Yu Lee, Teng-Hao Yeh
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Publication number: 20230105153Abstract: A method for performing communications specification version control of a memory device in predetermined communications architecture with aid of compatibility management, associated apparatus and computer-readable medium are provided.Type: ApplicationFiled: March 28, 2022Publication date: April 6, 2023Applicant: Silicon Motion, Inc.Inventors: Hong-Ren Fang, Chun-Che Yang, Cheng-Yu Lee, Te-Kai Wang
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Patent number: 11611801Abstract: The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.Type: GrantFiled: March 3, 2021Date of Patent: March 21, 2023Assignee: Realtek Semiconductor Corp.Inventors: Zhen-Rong Chen, Cheng-Yu Lee, Chia-Chi Yeh, Ming-Tsung Tsai