Patents by Inventor Cheng-Yun Hsu

Cheng-Yun Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11836092
    Abstract: Systems, apparatus and methods are provided for logical-to-physical (L2P) address translation. A method may comprise receiving a request for a first logical data address (LDA), and calculating a first translation data unit (TDU) index for a first TDU. The first TDU may contain a L2P entry for the first LDA. The method may further comprise searching a cache of lookup directory entries of recently accessed TDUs using the first TDU index, determining that there is a cache miss, generating and storing an outstanding request for the lookup directory entry for the first TDU in a miss buffer, retrieving the lookup directory entry for the first TDU from an in-memory lookup directory, determining that the lookup directory entry for the first TDU is not valid, reserve a TDU space for the first TDU in a memory and generating a load request for the first TDU.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: December 5, 2023
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Bo Fu, Chi-Chun Lai, Jie Chen, Dishi Lai, Jian Wu, Cheng-Yun Hsu, Qian Cheng
  • Publication number: 20230080105
    Abstract: Systems, apparatus and methods are provided for logical-to-physical (L2P) address translation. A method may comprise receiving a request for a first logical data address (LDA), and calculating a first translation data unit (TDU) index for a first TDU. The first TDU may contain a L2P entry for the first LDA. The method may further comprise searching a cache of lookup directory entries of recently accessed TDUs using the first TDU index, determining that there is a cache miss, generating and storing an outstanding request for the lookup directory entry for the first TDU in a miss buffer, retrieving the lookup directory entry for the first TDU from an in-memory lookup directory, determining that the lookup directory entry for the first TDU is not valid, reserve a TDU space for the first TDU in a memory and generating a load request for the first TDU.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 16, 2023
    Inventors: Bo FU, Chi-Chun LAI, Jie CHEN, Dishi LAI, Jian WU, Cheng-Yun HSU, Qian CHENG
  • Patent number: 11537530
    Abstract: Systems, apparatus and methods are provided for logical-to-physical (L2P) address translation. A method may comprise receiving a request for a first logical data address (LDA), and calculating a first translation data unit (TDU) index for a first TDU. The first TDU may contain a L2P entry for the first LDA. The method may further comprise searching a cache of lookup directory entries of recently accessed TDUs using the first TDU index, determining that there is a cache miss, generating and storing an outstanding request for the lookup directory entry for the first TDU in a miss buffer, retrieving the lookup directory entry for the first TDU from an in-memory lookup directory, determining that the lookup directory entry for the first TDU is not valid, reserve a TDU space for the first TDU in a memory and generating a load request for the first TDU.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: December 27, 2022
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Bo Fu, Chi-Chun Lai, Jie Chen, Dishi Lai, Jian Wu, Cheng-Yun Hsu, Qian Cheng
  • Publication number: 20220358050
    Abstract: Systems, apparatus and methods are provided for using a partial logical-to-physical (L2P) address translation table for multiple namespaces to perform address translation. An exemplary embodiment may provide a method comprising: receiving a request for a first logical data address (LDA) that belongs to a first namespace (NS); searching the first NS in an entry location table (ELT) for all namespaces whose L2P entries always reside in memory; determining that the first NS is not in the ELT; searching a cache of lookup directory entries of recently accessed translation data units (TDUs) for a first TDU containing a L2P entry for the first LDA; determining that there is a cache miss; retrieving the lookup directory entry for the first TDU from an in-memory lookup directory and determining that it is not valid; reserving a TDU space for the first TDU; and generating a load request for the first TDU.
    Type: Application
    Filed: June 30, 2022
    Publication date: November 10, 2022
    Inventors: Bo FU, Lin CHEN, Jie CHEN, Cheng-Yun HSU
  • Publication number: 20220358051
    Abstract: Systems, apparatus and methods are provided for logical-to-physical (L2P) address translation. A method may comprise receiving a request for a first logical data address (LDA), and calculating a first translation data unit (TDU) index for a first TDU. The first TDU may contain a L2P entry for the first LDA. The method may further comprise searching a cache of lookup directory entries of recently accessed TDUs using the first TDU index, determining that there is a cache miss, generating and storing an outstanding request for the lookup directory entry for the first TDU in a miss buffer, retrieving the lookup directory entry for the first TDU from an in-memory lookup directory, determining that the lookup directory entry for the first TDU is not valid, reserve a TDU space for the first TDU in a memory and generating a load request for the first TDU.
    Type: Application
    Filed: May 10, 2021
    Publication date: November 10, 2022
    Inventors: Bo FU, Chi-Chun LAI, Jie CHEN, Dishi LAI, Jian WU, Cheng-Yun HSU, Qian CHENG
  • Patent number: 11494117
    Abstract: A method for data processing, comprising updating intermediate storage information according to data to be processed and address information of the data to be processed in a first storage space, until the intermediate storage information has reached a preset size; and performing, in the first storage space, an operation corresponding to the data to be processed using the intermediate storage information, when the intermediate storage information reaches the preset size. By the above method, the computing cost for performing an operation corresponding to the data to be processed in the first storage space can be reduced, the efficiency in performing the corresponding operation can be improved, and with intermediate storage information adapted to the first storage spaces of different sizes, the number of operations on the first storage spaces can be reduced.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: November 8, 2022
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Ying Chu, Wei Chou, Qian Cheng, Cheng-Yun Hsu, Qun Zhao
  • Patent number: 11409665
    Abstract: Systems, apparatus and methods are provided for using a partial logical-to-physical (L2P) address translation table for multiple namespaces to perform address translation. An exemplary embodiment may provide a method comprising: receiving a request for a first logical data address (LDA) that belongs to a first namespace (NS); searching the first NS in an entry location table (ELT) for all namespaces whose L2P entries always reside in memory; determining that the first NS is not in the ELT; searching a cache of lookup directory entries of recently accessed translation data units (TDUs) for a first TDU containing a L2P entry for the first LDA; determining that there is a cache miss; retrieving the lookup directory entry for the first TDU from an in-memory lookup directory and determining that it is not valid; reserving a TDU space for the first TDU; and generating a load request for the first TDU.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: August 9, 2022
    Assignee: Innogrit Technologies Co., Ltd.
    Inventors: Bo Fu, Lin Chen, Jie Chen, Cheng-Yun Hsu
  • Patent number: 11188245
    Abstract: The present disclosure relates to a data storage device, system, and a data writing method. The device comprises a controller and a plurality of storage blocks, each storage block consisting of an idle storage block and a non-idle storage block, the controller connecting to each storage block respectively, wherein the controller is configured to generate, when receiving a data writing command, a self-adapting adjustment instruction according to a comparison between a storage distribution state of the storage block and a first threshold value to configure the idle-storage block as an SLC block or an XLC block; the storage block is configured to correspondingly adjust the storage distribution state according to the self-adapting adjustment instruction to store written data in the SLC block or the XLC block of the idle storage block.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: November 30, 2021
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Hui Wen, Qun Zhao, Qian Cheng, Ying Chu, Cheng-Yun Hsu