Abstract: Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and comprise a capture agent for analyte detection and a substantially transparent magnetic polymer. The analog code is generated by a two-dimensional shape of a substantially non-transparent layer. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.

Abstract: A portable computer and a charging method thereof are provided. The portable computer includes a charge integrated circuit (IC), a basic input/output system (BIOS) and embedded controller (EC), a south bridge chip, a north bridge chip and a central processing unit (CPU). After the portable computer is connected to a battery, the BIOS and EC controls the south bridge chip to read a sealed security bit of the battery and checks whether the sealed security bit equals a default value. The BIOS and EC controls the south bridge chip to read a battery data of the battery if the sealed security bit equals default value. The BIOS and EC controls the charge IC via the south bridge chip to charge the battery according to the battery data. The CPU controls the south bridge chip and the north bridge chip.

Abstract: A portable computer and a charging method thereof are provided. The portable computer includes a charge integrated circuit (IC), a basic input/output system (BIOS) and embedded controller (EC), a south bridge chip, a north bridge chip and a central processing unit (CPU). After the portable computer is connected to a battery, the BIOS and EC controls the south bridge chip to read a sealed security bit of the battery and checks whether the sealed security bit equals a default value. The BIOS and EC controls the south bridge chip to read a battery data of the battery if the sealed security bit equals default value. The BIOS and EC controls the charge IC via the south bridge chip to charge the battery according to the battery data. The CPU controls the south bridge chip and the north bridge chip.