Patents by Inventor Chengyue YANG

Chengyue YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959962
    Abstract: Apparatus and techniques for an integrated circuit (IC) package to automatically detect, through an input/out pin, external component parameters and parasitics. An example IC package generally includes a pin for coupling to a component external to the IC package, and at least one of a resistance detector, an inductance detector, or a capacitance detector coupled to the pin, and configured to detect at least one of a resistance, an inductance, or a capacitance, respectively, of a lumped parameter model for the component external to the IC package. The resistance detector, inductance detector, or capacitance detector may also be configured to detect parasitics associated with at least one of the component, the pin, or a connection between the component and the pin.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 16, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Chengyue Yu, Hua Guan, Yingjie Chen, Fan Yang, Yufei Pan, Jize Jiang, Shamim Ahmed
  • Patent number: 11508809
    Abstract: The present disclosure discloses a semiconductor device and a preparation method thereof. The semiconductor device includes: an N+ substrate, a plurality of openings opening toward a back surface formed in the N+ substrate; an N? epitaxial layer formed on the N+ substrate, the N? epitaxial layer including: an active area epitaxial layer including a plurality of P++ area rings and a plurality of groove structures, wherein single groove structure is formed on single P++ area ring; a terminal area epitaxial layer including an N+ field stop ring and a plurality of P+ guard rings; a Schottky contact formed on the active area epitaxial layer, a passivation layer formed on the terminal area epitaxial layer, and ohmic contacts formed on the back surface of the N+ substrate and in the plurality of openings.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: November 22, 2022
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Yidan Tang, Xinyu Liu, Yun Bai, Shengxu Dong, Chengyue Yang
  • Publication number: 20210074807
    Abstract: The present disclosure discloses a semiconductor device and a preparation method thereof. The semiconductor device includes: an N+ substrate, a plurality of openings opening toward a back surface formed in the N+ substrate; an N? epitaxial layer formed on the N+ substrate, the N? epitaxial layer including: an active area epitaxial layer including a plurality of P++ area rings and a plurality of groove structures, wherein single groove structure is formed on single P++ area ring; a terminal area epitaxial layer including an N+ field stop ring and a plurality of P+ guard rings; a Schottky contact formed on the active area epitaxial layer, a passivation layer formed on the terminal area epitaxial layer, and ohmic contacts formed on the back surface of the N+ substrate and in the plurality of openings.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 11, 2021
    Inventors: Yidan Tang, Xinyu Liu, Yun Bai, Shengxu Dong, Chengyue Yang
  • Patent number: 10763105
    Abstract: A method of manufacturing a grooved-gate MOSFET device based on a two-step microwave plasma oxidation, including: etching a grooved gate, and oxidizing silicon carbide on a surface of the grooved gate to silicon dioxide by microwave plasma to form a grooved-gate oxide layer, the step of forming the grooved-gate oxide layer including: placing a silicon carbide substrate subjected to the grooved gate etching in a microwave plasma generating device; introducing a first oxygen-containing gas, heating generated oxygen plasma to a first temperature at a first heating rate, and performing low-temperature plasma oxidation at the first temperature and a first pressure; heating the oxygen plasma to a second temperature at a second heating rate, introducing a second oxygen-containing gas, and performing high-temperature plasma oxidation at the second temperature and a second pressure until a predetermined thickness of silicon dioxide is formed; stopping introduction of the oxygen-containing gas, and completing the react
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: September 1, 2020
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Xinyu Liu, Yidan Tang, Shengkai Wang, Yun Bai, Chengyue Yang
  • Patent number: 10734199
    Abstract: A microwave plasma generating device for plasma oxidation of SiC, comprising an outer cavity and a plurality of micro-hole/micro-nano-structured double-coupling resonant cavities disposed in the outer cavity. Each resonant cavity includes a cylindrical cavity. A micro-hole array formed by a plurality of micro-holes is uniformly distributed on a peripheral wall of the cylindrical cavity, a diameter of each of the micro-holes is an odd multiple of wavelength, and an inner wall of the cylindrical cavity has a metal micro-nano structure, the metal micro-nano structure has a periodic dimension of ?/n, where ? is wavelength of an incident wave, and n is refractive index of material of the resonant cavity. The outer cavity is provided with an gas inlet for conveying an oxygen-containing gas into the outer cavity, and the oxygen-containing gas forms an oxygen plasma around the resonant cavities for oxidizing SiC; a stage is disposed under the resonant cavities.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: August 4, 2020
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Xinyu Liu, Yidan Tang, Shengkai Wang, Yun Bai, Chengyue Yang
  • Patent number: 10699898
    Abstract: A method for oxidizing a silicon carbide based on microwave plasma at an AC voltage, including: step one, providing a silicon carbide substrate, and placing the silicon carbide substrate in a microwave plasma generating device; step two, introducing oxygen-containing gas to generate oxygen plasma at an AC voltage; step three, controlling movements of oxygen ions and electrons in the oxygen plasma by the AC voltage to generate an oxide layer having a predetermined thickness on the silicon carbide substrate, wherein when a voltage of the silicon carbide substrate is negative, the oxygen ions move close to an interface and perform an oxidation reaction with the silicon carbide, and when the voltage of the silicon carbide substrate is positive, the electrons move close to the interface and perform a reduction reaction with the silicon carbide, removing carbon residue; step four, stopping the introduction of oxygen-containing gas and the reaction completely.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: June 30, 2020
    Assignee: INSTITUTE OF MICROELECTRONIICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Xinyu Liu, Shengkai Wang, Yun Bai, Yidan Tang, Zhonglin Han, Xiaoli Tian, Hong Chen, Chengyue Yang
  • Patent number: 10680067
    Abstract: The present disclosure discloses a self-aligned silicon carbide MOSFET device with an optimized P+ region and a manufacturing method thereof. The self-aligned silicon carbide MOSFET device is formed by a plurality of silicon carbide MOSFET device cells connected in parallel, and these silicon carbide MOSFET device cells are arranged evenly. The silicon carbide MOSFET device cell comprises two source electrodes, one gate electrode, one gate oxide layer, two N+ source regions, two P+ contact regions, two P wells, one N? drift layer, one buffer layer, one N+ substrate, one drain electrode and one isolation dielectric layer.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: June 9, 2020
    Assignees: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES, ZHUZHOU CRRC TIMES ELECTRIC CO., LTD.
    Inventors: Yidan Tang, Huajun Shen, Yun Bai, Jingtao Zhou, Chengyue Yang, Xinyu Liu, Chengzhan Li, Guoyou Liu
  • Publication number: 20200152451
    Abstract: A method for oxidizing a silicon carbide based on microwave plasma at an AC voltage, including: step one, providing a silicon carbide substrate, and placing the silicon carbide substrate in a microwave plasma generating device; step two, introducing oxygen-containing gas to generate oxygen plasma at an AC voltage; step three, controlling movements of oxygen ions and electrons in the oxygen plasma by the AC voltage to generate an oxide layer having a predetermined thickness on the silicon carbide substrate, wherein when a voltage of the silicon carbide substrate is negative, the oxygen ions move close to an interface and perform an oxidation reaction with the silicon carbide, and when the voltage of the silicon carbide substrate is positive, the electrons move close to the interface and perform a reduction reaction with the silicon carbide, removing carbon residue; step four, stopping the introduction of oxygen-containing gas and the reaction completely.
    Type: Application
    Filed: February 27, 2019
    Publication date: May 14, 2020
    Inventors: Xinyu LIU, Shengkai WANG, Yun BAI, Yidan TANG, Zhonglin HAN, Xiaoli TIAN, Hong CHEN, Chengyue YANG
  • Publication number: 20190362945
    Abstract: A microwave plasma generating device for plasma oxidation of SiC, comprising an outer cavity and a plurality of micro-hole/micro-nano-structured double-coupling resonant cavities disposed in the outer cavity. Each resonant cavity includes a cylindrical cavity. A micro-hole array formed by a plurality of micro-holes is uniformly distributed on a peripheral wall of the cylindrical cavity, a diameter of each of the micro-holes is an odd multiple of wavelength, and an inner wall of the cylindrical cavity has a metal micro-nano structure, the metal micro-nano structure has a periodic dimension of ?/n, where ? is wavelength of an incident wave, and n is refractive index of material of the resonant cavity. The outer cavity is provided with an gas inlet for conveying an oxygen-containing gas into the outer cavity, and the oxygen-containing gas forms an oxygen plasma around the resonant cavities for oxidizing SiC; a stage is disposed under the resonant cavities.
    Type: Application
    Filed: December 18, 2018
    Publication date: November 28, 2019
    Inventors: Xinyu LIU, Yidan TANG, Shengkai WANG, Yun BAI, Chengyue YANG
  • Publication number: 20190362966
    Abstract: A method of manufacturing a grooved-gate MOSFET device based on a two-step microwave plasma oxidation, including: etching a grooved gate, and oxidizing silicon carbide on a surface of the grooved gate to silicon dioxide by microwave plasma to form a grooved-gate oxide layer, the step of forming the grooved-gate oxide layer including: placing a silicon carbide substrate subjected to the grooved gate etching in a microwave plasma generating device; introducing a first oxygen-containing gas, heating generated oxygen plasma to a first temperature at a first heating rate, and performing low-temperature plasma oxidation at the first temperature and a first pressure; heating the oxygen plasma to a second temperature at a second heating rate, introducing a second oxygen-containing gas, and performing high-temperature plasma oxidation at the second temperature and a second pressure until a predetermined thickness of silicon dioxide is formed; stopping introduction of the oxygen-containing gas, and completing the react
    Type: Application
    Filed: December 27, 2018
    Publication date: November 28, 2019
    Inventors: Xinyu LIU, Yidan TANG, Shengkai WANG, Yun BAI, Chengyue YANG
  • Publication number: 20190013383
    Abstract: The present disclosure discloses a self-aligned silicon carbide MOSFET device with an optimized P+ region and a manufacturing method thereof. The self-aligned silicon carbide MOSFET device is formed by a plurality of silicon carbide MOSFET device cells connected in parallel, and these silicon carbide MOSFET device cells are arranged evenly. The silicon carbide MOSFET device cell comprises two source electrodes, one gate electrode, one gate oxide layer, two N+ source regions, two P+ contact regions, two P wells, one N- drift layer, one buffer layer, one N+ substrate, one drain electrode and one isolation dielectric layer.
    Type: Application
    Filed: September 10, 2015
    Publication date: January 10, 2019
    Applicants: INSTITUTE OF MICROELECTRONICS ,CHINESE ACADEMY OF SCIENCES, ZHUZHOU CRRC TIMES ELECTRIC CO., LTD.
    Inventors: Yidan TANG, Huajun SHEN, Yun BAI, Jingtao ZHOU, Chengyue YANG, Xinyu LIU, Chengzhan LI, Guoyou LIU