Patents by Inventor Chen Yu Yang
Chen Yu Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12008935Abstract: An arcuate display device includes a plurality of display units each having has a plurality of pixels, a virtual axis, and a plurality of driving devices. Each pixel includes first, second, and third light-emitting elements respectively disposed at first, second, and third positions. The driving devices corresponding to the display units having the same minimum distance from the virtual axis have the same circuit layout design. The first, second, and third positions are sequentially arranged in a direction away from the virtual axis. Optical properties of the first light-emitting elements and the third light-emitting elements in at least a part of the pixels disposed at a first side of the virtual axis are respectively substantially the same as optical properties of the third light-emitting elements and the first light-emitting elements in at least a part of the pixels disposed at a second side of the virtual axis.Type: GrantFiled: March 1, 2023Date of Patent: June 11, 2024Assignee: AUO CorporationInventors: Kai-Yi Lu, Hung-Chi Wang, Chen-Yu Lin, Ya-Fang Chen, Chih-Hsiang Yang
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Publication number: 20240176335Abstract: A fault detection method, includes the following steps. A target sequence is received, the target sequence includes several data. A first moving average operation is performed on the target sequence to establish a first moving average sequence. A second moving average operation is performed on the target sequence to establish a second moving average sequence. A difference operation between the first moving average sequence and the second moving average sequence is performed to obtain a difference sequence, the difference sequence includes several difference values. An upper limit value is set. When one of the difference values is greater than the upper limit value, the target sequence is determines as abnormal.Type: ApplicationFiled: February 6, 2024Publication date: May 30, 2024Inventors: Yung-Yu Yang, Kang-Ping Li, Chih-Kuan Chang, Chung-Chih Hung, Chen-Hui Huang, Nai-Ying Lo, Shih-Wei Huang
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Publication number: 20240176093Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Patent number: 11993782Abstract: Provided is a lentivirus packaging system, which comprises: a transfer plasmid comprising a nucleotide sequence of TAR-reserved-chimeric 5? long terminal repeat (LTR); at least one packaging plasmid comprising a nucleotide sequence encoding TAR RNA binding protein, a nucleotide sequence of rev gene, a nucleotide sequence of gag gene, and a nucleotide sequence of pol gene; and an envelope plasmid. Due to the expression of gene of TAR RNA binding protein by the packaging plasmids, the produced lentivirus has higher virus titer and can improve the transduction rate and the gene delivery efficiency during cell transduction. The present invention further provides a method of improving lentivirus production in a host cell, which comprises using the lentivirus packaging system to transfect the host cell. The present invention further provides a cell transduced by the lentivirus and a method of using the cell for treating cancer.Type: GrantFiled: July 16, 2021Date of Patent: May 28, 2024Assignee: PELL BIO-MED TECHNOLOGY CO., LTD.Inventors: Wei-Chi Lin, Ssu-Yu Chou, Yao-Cheng Yang, Chien-Ting Lin, Chen-Lung Lin
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Patent number: 11990430Abstract: A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.Type: GrantFiled: February 26, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen-Yu Tsai, Ku-Feng Yang, Wen-Chih Chiou
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Publication number: 20240107986Abstract: A fish identification method is provided. The fish identification method includes capturing an image through a processor, wherein the image includes a fish image. The fish identification method includes identifying a plurality of feature points of the fish image through a coordinate detection model and obtaining a plurality of sets of feature-point coordinates. Each of the plurality of sets of feature-point coordinates corresponds to each of the plurality of feature points. The fish identification method further includes calculating a body length or an overall length of the fish image according to the plurality of sets of feature-point coordinates of the image.Type: ApplicationFiled: January 13, 2023Publication date: April 4, 2024Inventors: Zhe-Yu LIN, Chih-Yi CHIEN, Chen Wei YANG, Tsun-Hsien KUO
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Publication number: 20240111337Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.Type: ApplicationFiled: May 8, 2023Publication date: April 4, 2024Applicant: Acer IncorporatedInventors: Wei-Chih Wang, Chen-Min Hsiu, Chien-Yu Lee, Szu-Wei Yang, Fang-Ying Huang
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Patent number: 11943877Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.Type: GrantFiled: March 2, 2022Date of Patent: March 26, 2024Assignee: Unimicron Technology Corp.Inventors: Wen-Yu Lin, Kai-Ming Yang, Chen-Hao Lin, Pu-Ju Lin, Cheng-Ta Ko, Chin-Sheng Wang, Guang-Hwa Ma, Tzyy-Jang Tseng
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Publication number: 20240097035Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20240096705Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20230408437Abstract: The present disclosure provides an electrochemical system, including an electrode unit and a reactive unit electrically coupled to the electrode unit. The electrode unit includes a working electrode and a counter electrode, wherein a current density of the counter electrode is greater than a current density of the working electrode. An implantable biochemical test chip is also provided.Type: ApplicationFiled: December 21, 2022Publication date: December 21, 2023Inventors: CHEN-YU YANG, CHIH-LIANG YANG
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Publication number: 20230031475Abstract: An electrochemical detection system is configured to detect a sample. The electrochemical detection system includes an electrochemical test strip and a measuring instrument. The electrochemical test strip includes a main body and at least one electrode group. The measuring instrument is electrically connected to the at least one electrode group. The measuring instrument is adapted to determine whether a flow field condition of the sample is normal via the at least one electrode group.Type: ApplicationFiled: November 30, 2021Publication date: February 2, 2023Applicant: APEX BIOTECHNOLOGY CORP.Inventors: Chen-Yu Yang, Yu-Han Tseng
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Publication number: 20220161256Abstract: The present disclosure provides a biochemical test chip, including an electrode unit and a protective layer. The protective layer is electrically connected to the electrode unit. The protective layer is configured to oxidize the electrode unit after the electrode unit receives an electron or reduce the electrode unit after the electrode unit loses an electron. There is a potential difference (Ecell0) between the protecting layer and the electrode unit.Type: ApplicationFiled: September 28, 2021Publication date: May 26, 2022Inventors: Cheng-Yu CHOU, Chen-Yu YANG
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Publication number: 20220163476Abstract: The present disclosure provides a biochemical test chip, including an insulating substrate, an electrode unit, a first insulating septum, a reactive layer and a second insulating septum. The electrode unit is located on the insulating substrate. The electrode unit includes a working electrode and a counter electrode. A current density of the counter electrode is greater than a current density of the working electrode. The first insulating septum is located on the electrode unit. The first insulating septum has an opening, which at least partially exposes the electrode unit. The reactive layer is located in the opening and is electrically connected to the electrode unit. The second insulating septum is located on the first insulating septum.Type: ApplicationFiled: June 4, 2021Publication date: May 26, 2022Inventors: Chen-Yu YANG, Cheng-Yu CHOU
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Publication number: 20140174948Abstract: A method of a test strip detecting concentration of an analyte of a sample includes placing the sample in a reaction region of the test strip, wherein the analyte reacts with an enzyme to generate a plurality of electrons, and the plurality of electrons are transferred to a working electrode of the reaction region through a mediator; applying an electrical signal to the working electrode; measuring a first current through the working electrode during a first period; the mediator generating an intermediate according to the electrical signal during a second period; measuring a second current through the working electrode during a third period; calculating initial concentration of the analyte according to the first current; calculating a diffusion factor of the intermediate in the sample according to the second current; and correcting the initial concentration to generate new concentration of the analyte according to the diffusion factor.Type: ApplicationFiled: December 22, 2013Publication date: June 26, 2014Applicant: TYSON BIORESEARCH INC.Inventors: Cheng-Che Lee, Wen-Huang Chen, Han-Ching Tsai, Chen-Yu Yang
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Publication number: 20120048347Abstract: A photovoltaic panel includes a substrate, a photovoltaic array formed on the substrate; two bus bars formed on the substrate and electrically connected to the photovoltaic array; two interconnecting wires connected to the bus bars; two partially-overlapped first insulation films; a first encapsulating film; a rear substrate; and a junction box disposed on the rear substrate. The first insulation films are located between the interconnecting wires and the photovoltaic array. The first encapsulating film covers the photovoltaic array, the bus bars, the interconnecting wires and the first insulation films. The first encapsulating film has two first slits for allowing the interconnecting wires to pass through. The rear substrate covers the first encapsulating film and has at least one opening for allowing the interconnecting wires to pass through. The interconnecting wires are electrically connected between the junction box and the bus bars to output the current produced by the photovoltaic array.Type: ApplicationFiled: July 22, 2011Publication date: March 1, 2012Applicant: Du Pont Apollo LimitedInventors: Chen-Yu YANG, Chi-Lai Lee, Wei-Lun Hsiao
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Publication number: 20120048331Abstract: A photovoltaic module and a junction box thereof are provided. The photovoltaic module includes a photovoltaic panel, a box body, an electrode and a metal fastener. The photovoltaic panel has a plurality of interconnecting wires. The electrode is located in the box body for electrically connecting to an interconnecting wire of a photovoltaic panel. The metal fastener is fixed on the electrode for clamping an interconnecting wire between the metal fastener and the electrode.Type: ApplicationFiled: July 26, 2011Publication date: March 1, 2012Applicant: Du Pont Apollo LimitedInventors: Chen-Yu Yang, Hao-Kun Lien
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Patent number: 8044981Abstract: Image display systems comprising a first pixel, a second pixel, a scan line, a first data line, and a second data line. In the first pixel, a first transistor is coupled to a first storage capacitor via a first pixel electrode. In the second pixel, a second transistor is coupled to a second storage capacitor via a second pixel electrode. The conductance of the first and second transistors is simultaneously controlled by a scan signal transmitted by the scan line. In a first time interval, the first data line transmits a voltage data to the first pixel electrode via the first transistor. In a second time interval, the second data line transmits the voltage data to the second pixel electrode via the second transistor. The first storage capacitor is designed to generate a proper feedthrough voltage at the first pixel electrode to compensate for a voltage coupling shift at the first pixel electrode that is generated during the second time interval because of the voltage variation at the second pixel electrode.Type: GrantFiled: April 29, 2008Date of Patent: October 25, 2011Assignee: Chimei Innolux CorporationInventors: Cheng-Hsin Chen, Chen-Yu Yang
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Publication number: 20110155212Abstract: A solar panel assembly includes a solar panel, a gasket, a metal frame and a thermal paste. The solar panel has an upper glass substrate and a lower substrate. The gasket seals and sandwiches respective edges of the upper and lower substrates. The metal frame encloses the gasket. The thermal paste is disposed along the gasket or to enclose the gasket.Type: ApplicationFiled: December 9, 2010Publication date: June 30, 2011Applicant: Du Pont Apollo LimitedInventors: Chen-Yu Yang, Cheng-Hsin Chen, Hsien-Hsin Yeh