Abstract: A liquid crystal display includes: a gate line extending in a first direction; a first data line and a second data line extending in a second direction; a thin film transistor (TFT) including a gate electrode connected to the gate line, a source electrode connected to the first data line, and a drain electrode; a vertical storage electrode line extending between the first and second data lines; a passivation layer disposed on the TFT and the vertical storage electrode line; an insulating layer disposed on the passivation layer; and a subpixel electrode disposed on the insulating layer, connected to the drain electrode, wherein the vertical storage electrode line includes an expansion, the insulating layer includes an opening exposing a portion of the passivation layer overlapping the expansion, and wherein the subpixel electrode includes a protrusion overlapping the expansion, a reinforced storage capacitor being formed between the protrusion and the expansion.

Abstract: A display device including: a scan driver that transmits scan signals to scan lines; a data driver that data signals to data lines; and a display portion that includes pixels, respectively connected to the corresponding scan lines and corresponding data lines, and displays an image by the pixels that simultaneously emit light according to the corresponding data signals, wherein each of pixels includes: an organic light emitting diode; a first transistor that includes a gate connected to a first node, and is connected between first power and an anode of the organic light emitting diode; a second transistor that includes a gate connected to a corresponding scan line and transmits the corresponding data signal to the first node; and a first capacitor that is connected to the first node, and stores a data voltage according to the data signal.

Abstract: A display panel includes a plurality of pixels each including a first transistor between a first node and a second node and having a gate electrode to receive the scan signal, a second transistor between the second node and a third node in series with the first transistor and having a gate electrode to receive the initialization control signal, a driving transistor between the first power voltage providing line and the third node and having a gate electrode connected to the first node, a third transistor between the third node and a fourth node and having a gate electrode to receive the emission control signal, an organic light emitting diode, between the fourth node and the second power voltage providing line, a first capacitor between the first power voltage providing line and the first node, and a second capacitor between the second node and one of the data lines.

Abstract: An organic light emitting (OLE) display device includes pixels connected to scan lines (SLs), data lines (DLs), and a first control line (FCL) commonly connected to the pixels. Each pixel includes: an OLE diode connected between a first power source (PS) and a second PS; a first transistor (TFT1) connected between the first PS and the OLE diode, a gate electrode (GE) of the TFT1 being connected to a first node (N1); a second transistor (TFT2) connected between the N1 and a second node (N2), a GE of the TFT2 being connected to a SL; a third transistor (TFT3) connected between the N2 and a third node (N3), the N3 being connected between the TFT1 and the OLED, a GE of the TFT3 being connected to the FCL; a first capacitor connected between the first PS and the N1; and a second capacitor connected between the N2 and a DL.

Abstract: A pixel circuit includes three transistors, a capacitor, and an OLED. The first transistor includes a gate terminal for receiving a first control signal, a first terminal connected to a first node, and a second terminal connected to a second node. The second transistor includes a gate terminal for receiving a second control signal, a first terminal connected to the second node, and a second terminal connected to a third node. The third transistor includes a gate terminal connected to the first node, a first terminal for receiving a first power signal, and a second terminal connected to the third node. The capacitor may receive an initialization signal and is connected to the first node. The OLED is connected to the third node and may receive a second power signal. The control signals have same voltage levels in a data writing period and have different voltage levels in other periods.

Abstract: A display device includes: a substrate; a plurality of pixels provided in a pixel region of the substrate; a scan line and a data line, connected to each of the plurality of pixels; a first transistor connected to the scan line and the data line and a second transistor connected to the first transistor; a light emitting element connected to the transistor; a first blocking layer disposed between the substrate and the first transistor, the first blocking layer being electrically connected to the first transistor; and a second blocking layer disposed between the substrate and the second transistor, the second blocking layer being electrically connected to the second transistor, wherein the first blocking layer is connected to a gate electrode of the first transistor, and the second blocking layer is connected to any one of source and drain electrodes of the second transistor.

Abstract: A method of driving a display panel includes providing a positive polarity data signal to a first data line during an odd-numbered frame, and providing a negative polarity data signal to the first data line during an even-numbered frame. The positive polarity data signal has a first polarity. The negative polarity data signal has a second polarity. Output timing of the positive polarity data signal is different from output timing of the negative polarity data signal.

Abstract: A display device includes: an initialization power line extending along a first direction; a scan line extending along the first direction and spaced apart from the initialization power line, a data line and a driving voltage line insulated from the initialization power line and the scan line and extending along the second direction; a first switching element including a first electrode connected to the driving voltage line, a first gate electrode overlapping the initialization power line, and a second electrode; a second switching element including a third electrode connected to the first gate electrode, a second gate electrode connected to the scan line, and a fourth electrode; a third switching element including a fifth electrode connected to the fourth electrode, a third gate electrode connected to the initialization power line, and a sixth electrode connected to the second electrode; and a light emitting element connected to the second electrode.

Abstract: A display device includes: a substrate; a plurality of pixels provided in a pixel region of the substrate; a scan line and a data line, connected to each of the plurality of pixels; a first transistor connected to the scan line and the data line and a second transistor connected to the first transistor; a light emitting element connected to the transistor; a first blocking layer disposed between the substrate and the first transistor, the first blocking layer being electrically connected to the first transistor; and a second blocking layer disposed between the substrate and the second transistor, the second blocking layer being electrically connected to the second transistor, wherein the first blocking layer is connected to a gate electrode of the first transistor, and the second blocking layer is connected to any one of source and drain electrodes of the second transistor.

Abstract: A liquid crystal display device includes a substrate, a first coupling electrode disposed on the substrate, a first insulating layer disposed on the first coupling electrode, a second coupling electrode disposed on the first insulating layer and capacitively coupled to the first coupling electrode, a second insulating layer disposed on the second coupling electrode, and a pixel electrode including first and second sub-pixel electrodes, which are disposed on the second insulating layer and are electrically insulated from each other, where the first sub-pixel electrode is electrically connected to the first coupling electrode via a first contact hole, which is defined in the first and second insulating layers, and the second sub-pixel electrode is electrically connected to the second coupling electrode via a second contact hole which is defined in the second insulating layer.

Abstract: An organic light emitting display device includes a plurality of pixels. Each of the pixels includes an organic light emitting diode, first to third transistors, a storage capacitor, and a first capacitor. The second transistor includes a gate electrode receiving a first scan signal, a first electrode receiving a data signal, and a second electrode connected to a first electrode of the first transistor. The third transistor includes a gate electrode receiving a second scan signal, a first electrode connected to a second electrode of the first transistor, and a second electrode connected to a gate electrode of the first transistor. The storage capacitor includes a first electrode receiving a power voltage and a second electrode connected to the gate electrode of the first transistor. The first capacitor includes a first electrode connected to the gate electrode of the third transistor and a second electrode receiving the power voltage.

Abstract: A scan driver, includes a plurality of stage circuits, each of which includes a driving circuit unit providing an output signal and an inverter inverting the output signal of the driving circuit unit and generating a scan signal, in which the inverter includes a first transistor and a second transistor, which are complementarily operated, the first transistor is a P-type polysilicon transistor, and the second transistor is an N-type oxide semiconductor transistor. A display device may include the scan driver.

Abstract: A display device includes: a substrate; a plurality of pixels provided in a pixel region of the substrate; a scan line and a data line, connected to each of the plurality of pixels; a first transistor connected to the scan line and the data line and a second transistor connected to the first transistor; a light emitting element connected to the transistor; a first blocking layer disposed between the substrate and the first transistor, the first blocking layer being electrically connected to the first transistor; and a second blocking layer disposed between the substrate and the second transistor, the second blocking layer being electrically connected to the second transistor, wherein the first blocking layer is connected to a gate electrode of the first transistor, and the second blocking layer is connected to any one of source and drain electrodes of the second transistor.

Abstract: A display device having a gate driver which may reduce generation of ripple at the output of the gate drive includes: a substrate; and a driver circuit including a thin film transistor disposed on the substrate, the thin film transistor including: a first gate electrode disposed on the substrate; a semiconductor layer disposed on the first gate electrode to overlap a part of the first gate electrode, the semiconductor layer including channel, source, and drain regions; a second gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer and respectively connected to the source region and the drain region, wherein a first area formed by the overlapping portion of the first gate electrode and the drain region has a different size than a second area formed by the overlapping portion of the first gate electrode and the source region.

Abstract: A display apparatus includes a first substrate including a channel-forming area, a second substrate facing the first substrate, a thin-film transistor disposed on the first substrate, a pixel electrode electrically connected to the thin-film transistor, a gate line disposed on the first substrate and electrically connected to the thin-film transistor, a data line electrically connected to the thin-film transistor and divided into at least two portions such that the channel-forming area is disposed between the two portions of the data line, and a connection portion electrically connecting the two portions of the data line to each other, in which the thin-film transistor includes a gate electrode branched from the gate line and overlapping the channel-forming area, a semiconductor pattern overlapping the gate electrode and contacting the two portions of the data line so that the channel-forming area is disposed in the semiconductor pattern, and a drain electrode electrically connected to the pixel electrode and

Abstract: A curved display device including a gate line and a first data line, a first switching element connected to the gate line and the first data line, and a first subpixel electrode connected to the first switching element and including a first horizontal stem part, a second horizontal stem part, and a vertical stem part, in which the first subpixel electrode includes a first sub region, a second sub region, a third sub region, and a fourth sub region which are divided by the first horizontal stem part, the second horizontal stem part, and the vertical stem part.

Abstract: Provided is a liquid crystal display device including: a substrate; a first gate line; a first data line and a second data line to which data voltages with different polarities are applied; a first pixel electrode connected to the first gate line and the first data line; a liquid crystal layer formed on the first pixel electrode; and a first common electrode and a second common electrode disposed on the liquid crystal layer, in which the first pixel electrode includes a first subpixel electrode overlapping with the first common electrode and a second subpixel electrode overlapping with the second common electrode. A first voltage and A second voltage are alternatingly applied to the first common electrode and the second common electrode every two or more frames, respectively.

Abstract: A liquid crystal display device includes a substrate, a first coupling electrode disposed on the substrate, a first insulating layer disposed on the first coupling electrode, a second coupling electrode disposed on the first insulating layer and capacitively coupled to the first coupling electrode, a second insulating layer disposed on the second coupling electrode, and a pixel electrode including first and second sub-pixel electrodes, which are disposed on the second insulating layer and are electrically insulated from each other, where the first sub-pixel electrode is electrically connected to the first coupling electrode via a first contact hole, which is defined in the first and second insulating layers, and the second sub-pixel electrode is electrically connected to the second coupling electrode via a second contact hole which is defined in the second insulating layer.

Abstract: A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.

Abstract: A gate driver includes a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first input transistor and a second input transistor, where an output terminal of the first input transistor and an input terminal of the second input transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the first input terminal and the second node.