Patents by Inventor Cheol-Kyu Yang
Cheol-Kyu Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11940725Abstract: A blankmask for EUV lithography includes a substrate, a reflective layer, a capping layer, and a phase shift layer. The phase shift layer is made of a material containing ruthenium (Ru) and chromium (Cr), and a total content of ruthenium (Ru) and chromium (Cr) is 50 to 100 at %. The phase shift layer may further contain boron (B) or nitrogen (N). The phase shift layer of the present invention has a high relative reflectance (relative reflectance with respect to a reflectance of the reflective layer under the phase shift layer) with respect to a tantalum (Ta)-based phase shift layer and has a phase shift amount of 170 to 230°. It is possible to obtain excellent resolution when finally manufacturing a pattern of 7 nm or less by using a photomask manufactured using such a blankmask.Type: GrantFiled: December 6, 2021Date of Patent: March 26, 2024Assignee: S&S Tech Co., Ltd.Inventors: Cheol Shin, Yong-Dae Kim, Jong-Hwa Lee, Chul-Kyu Yang, Min-Kwang Park, Mi-Kyung Woo
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Patent number: 9666459Abstract: A wafer processing apparatus includes a reaction tube extending in a vertical direction, a door plate positioned under the reaction tube to seal the reaction tube. The door plate may be configured to load a boat into the reaction tube and support a plurality of wafers. The wafer processing apparatus may include a cap plate on the door plate, the cap plate including a cylindrical body. The cylindrical body may surround a lower side surface of the boat. A guiding recess may be formed in an outer surface of the cylindrical body along a circumferential direction of the cylindrical body. The wafer processing apparatus may include an exhaust portion configured to remove the first gas from the reaction tube through the guiding recess.Type: GrantFiled: February 28, 2014Date of Patent: May 30, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Cheol-Kyu Yang, Seog-Min Lee, Chul-Young Jang, Dong-Min Son, Byung-Ho Ahn
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Publication number: 20170051409Abstract: A thin film deposition apparatus, including a processing chamber; a boat in the processing chamber, the boat to accommodate a plurality of substrates therein; and a nozzle to supply a source gas to the processing chamber to form a thin film on each of the substrates, the nozzle including a plurality of T-shaped nozzle pipes, each of the T-shaped nozzle pipes including a first pipe having closed ends and a second pipe coupled to a middle portion of the first pipe.Type: ApplicationFiled: May 26, 2016Publication date: February 23, 2017Inventors: Young Jin NOH, Dong Min SON, Jae Myung CHOE, Jae Young AHN, Cheol Kyu YANG
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Patent number: 9159591Abstract: A batch type apparatus may include a tube; a boat configured to receive a plurality of semiconductor substrates, the boat vertically moved into the tube; a gas nozzle vertically arranged in the tube, the tube having a first portion and a second portion upwardly extended from the first portion; a gas pipe for supplying reaction gases to the gas nozzle, the gas pipe having a horizontal extension and a vertical extension, and the vertical extension extended in the gas nozzle; a fixing member for fixing the first portion of the gas nozzle to the gas pipe, the fixing member having strength higher than that of the gas nozzle; and a clamping member for clamping the gas pipe to the tube. Therefore, breakage of the gas nozzle may be suppressed.Type: GrantFiled: September 13, 2012Date of Patent: October 13, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Cheol-Kyu Yang, Seog-Min Lee, Chul-Young Jang, Dong-Min Son, Byung-Ho Ahn, Du-Han Jeon, Yong-Kyu Joo, Sang-Cheol Ha
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Publication number: 20140261174Abstract: A wafer processing apparatus includes a reaction tube extending in a vertical direction, a door plate positioned under the reaction tube to seal the reaction tube. The door plate may be configured to load a boat into the reaction tube and support a plurality of wafers. The wafer processing apparatus may include a cap plate on the door plate, the cap plate including a cylindrical body. The cylindrical body may surround a lower side surface of the boat. A guiding recess may be formed in an outer surface of the cylindrical body along a circumferential direction of the cylindrical body. The wafer processing apparatus may include an exhaust portion configured to remove the first gas from the reaction tube through the guiding recess.Type: ApplicationFiled: February 28, 2014Publication date: September 18, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Cheol-Kyu YANG, Seog-Min LEE, Chul-Young JANG, Dong-Min SON, Byung-Ho AHN
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Publication number: 20130167774Abstract: A batch type apparatus may include a tube; a boat configured to receive a plurality of semiconductor substrates, the boat vertically moved into the tube; a gas nozzle vertically arranged in the tube, the tube having a first portion and a second portion upwardly extended from the first portion; a gas pipe for supplying reaction gases to the gas nozzle, the gas pipe having a horizontal extension and a vertical extension, and the vertical extension extended in the gas nozzle; a fixing member for fixing the first portion of the gas nozzle to the gas pipe, the fixing member having strength higher than that of the gas nozzle; and a clamping member for clamping the gas pipe to the tube. Therefore, breakage of the gas nozzle may be suppressed.Type: ApplicationFiled: September 13, 2012Publication date: July 4, 2013Inventors: Cheol-Kyu Yang, Seong-Min Lee, Chul-Young Jang, Dong-Min Son, Byung-Ho Ahn, Du-Han Jeon, Yong-Kyu Joo, Sang-Cheol Ha
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Method of forming silicon oxynitride layer in semiconductor device and apparatus of forming the same
Patent number: 7189661Abstract: There are provided a method and an apparatus of forming an insulating layer including silicon oxynitride. The method includes performing a plasma treatment process for supplying a plasma reaction gas to a substrate to be treated after completing the annealing process. The apparatus includes a sealed processing room having gas supply and exhaust lines running thereto. A quartz inner tube and quartz inlet pipe both include holes therethrough, but in orthogonal directions to one another, to flow a reaction gas onto the wafers loaded within the sealed processing room.Type: GrantFiled: July 13, 2005Date of Patent: March 13, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Sub You, Cheol-Kyu Yang, Woong Lee, Jae-Chul Lee, Hun-Hyeoung Leam -
Patent number: 7131456Abstract: A mass flow controller includes a base having a passage that allows a fluid to pass through the passage. A first control valve controls a mass flow of a fluid passing through the passage. A second control valve controls a full scale of the mass flow of the fluid. A bypass portion is disposed in the passage through which the fluid passes. A mass flow sensor measures the mass flow of the fluid passing through the bypass portion. The second control valve is connected to the passage adjacent to the bypass portion for controlling the full scale of the mass flow of the fluid passing through the bypass portion.Type: GrantFiled: February 24, 2004Date of Patent: November 7, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Ho Kang, Sung-Wook Jung, In-Pil Cha, Cheol-Kyu Yang
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Method of forming silicon oxynitride layer in semiconductor device and apparatus of forming the same
Publication number: 20060063391Abstract: There are provided a method and an apparatus of forming an insulating layer including silicon oxynitride. The method includes performing a plasma treatment process for supplying a plasma reaction gas to a substrate to be treated after completing the annealing process. The apparatus includes as sealed processing room having gas supply and exhaust lines running thereto. A quartz inner tube and quartz inlet pipe both include holes therethrough, but in orthogonal directions to one another, to flow a reaction gas onto the wafers loaded within the sealed processing room.Type: ApplicationFiled: July 13, 2005Publication date: March 23, 2006Inventors: Young-Sub You, Cheol-Kyu Yang, Woong Lee, Jae-Chul Lee, Hun-Hyeoung Leam -
Publication number: 20050263073Abstract: A furnace for heating a wafer is provided comprising a process chamber including a space for processing a plurality of wafers. A heating member is disposed in the process chamber which generates a light and heat for heating the wafers. Moreover, a light blocking member is disposed in the process chamber for preventing the light from being transmitted onto the wafers but which permits the heat to be transmitted onto the wafers for heating the wafers. The furnace can be employed in an apparatus for chemical vapor deposition.Type: ApplicationFiled: May 6, 2005Publication date: December 1, 2005Inventors: Sung-Ho Kang, Jae-Chul Lee, Sang-Cheol Ha, In-Pil Cha, Duk-Young Jang, Sung-Bum Park, Cheol-Kyu Yang
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Publication number: 20040187927Abstract: A mass flow controller includes a base having a passage that allows a fluid to pass through the passage. A first control valve controls a mass flow of a fluid passing through the passage. A second control valve controls a full scale of the mass flow of the fluid. A bypass portion is disposed in the passage through which the fluid passes. A mass flow sensor measures the mass flow of the fluid passing through the bypass portion. The second control valve is connected to the passage adjacent to the bypass portion for controlling the full scale of the mass flow of the fluid passing through the bypass portion.Type: ApplicationFiled: February 24, 2004Publication date: September 30, 2004Applicant: Samsung Electronics Co., Ltd.Inventors: Sung-Ho Kang, Sung-Wook Jung, In-Pil Cha, Cheol-Kyu Yang